Reference Guide

Item
How is data input to this
memory?
How is this memory write
protected?
How is the memory
cleared?
SAS EXPANDER BOARD
NVSRAM Memory
PM8056 writes
configuration data to
NVSRAM
Not WP. Not visible to
Host Processor
User cannot clear the
memory.
BP FRU (SELF PORT)
Pre-programmed before
assembly
Not WP
The user cannot clear
memory.
BP FRU (OTHER PORT)
Pre-programmed before
assembly
Not WP
The user cannot clear
memory.
EXP FRU
Pre-programmed before
assembly
Not WP
The user cannot clear
memory.
Zoning-Configure FRU
PM8056 writes zoning
data to FRU
Not WP
The user cannot clear
memory.
FLASH
Pre-programmed before
assembly
Not WP
The user cannot clear
memory.
2.5” SSD BP
SEP internal flash
Pre-programmed before
assembly
Not WP
The user cannot clear
memory.
MID-Plane
FRU
Programmed at ICT during
production.
Not WP
The user cannot clear
memory.
FH Riser Board
CR_SPI
Pre-programmed before
assembly.
Not WP
MBC_RGT_CP
SPI interface via iDRAC
Software write protected
X16 CABLE MAIN RISER BOARD
CR_SPI
Pre-programmed before
assembly.
Not WP
MBC_RGT_CP
SPI interface via iDRAC
Software write protected
X16 Riser board
CR_SPI
Pre-programmed before
assembly.
Not WP
MBC_RGT_CP
SPI interface via iDRAC
Software write protected
PCIE Switch board(Gen4)
EEROM
Pre-programmed before
assembly
Not WP.
Cannot be cleared with
existing tools available to
the customer.
FRU
Programmed at ICT during
production.
Not WP
Cannot be cleared with
existing tools available to
the customer.