Reference Guide

Active I/O Risers
I/O Riser FRU image
I2C EEPROM
No
FRU
Configuration image
EEPROM
No
Firmware that configures PEX
switch ports and feature support
12GB Daughter Card (Performance or Unified)
Flash memory
Flash
No
Firmware
Expander NVRAM
NVRAM
No
Expander Logging Storage during
run time
Expander FRU image
I2C EEPROM
No
FRU
Memory Riser
Mem FRU image
I2C EEPROM
No
FRU
MEM VDDQ Regulators
OTP(one time
programmable)
No
Operational parameters
System Memory
RAM
Yes
System OS RAM
Item
How is data input to this memory?
How is this memory write protected?
Planer
PBG Internal CMOS NVRAM
BIOS
N/A – BIOS only control
BIOS SPI Flash
SPI interface via iDRAC
Software write protected
iDRAC SPI Flash
SPI interface via iDRAC
Embedded iDRAC subsystem firmware actively
controls sub area based write protection as
needed.
IDRAC SDRAM
Video Interface
N/A – Embedded iDRAC video subsystem only
BMC EMMC
NAND Flash interface via iDRAC
Embedded FW write protected
CPU Vcore and VSA
Regulators
Once values are loaded into register
space a cmd writes to nvram.
There are passwords for different sections of the
register space
System CPLD
OTP(one time programmable) at
factory
N/A – Factory only control
TPM
Data is pre-programmed by vendor.
Keys are updated using TPM-enabled
operating systems.
Software write protected
Power Supplies