Owners Manual
Table Of Contents
- Dell EMC PowerEdge MX840c Installation and Service Manual
- About this document
- Dell EMC PowerEdge MX840c overview
- Initial system setup and configuration
- Installing and removing sled components
- Safety instructions
- Before working inside your sled
- After working inside your sled
- Recommended tools
- PowerEdge MX840c sled
- Sled cover
- Air shroud
- Processor expansion module
- Drives
- Drive backplane
- Cable routing
- Drive cage
- Battery backup unit
- Control panel
- System memory
- Processors and heat sinks
- iDRAC card
- PERC cards
- Optional Internal dual SD module
- M.2 BOSS module
- Mezzanine card
- Optional internal USB memory key
- System battery
- System board
- Trusted Platform Module
- Jumpers and connectors
- System diagnostics and indicator codes
- Getting help
- Documentation resources
Table 11. Memory population rules (continued)
Processor Configuration Memory population Memory population information
population should
match)
A{5}, B{5},
A{6}, B{6}
in turn will result in performance loss. It
is recommended to populate all memory
channels identically with identical DIMMs
for best performance.
NOTE: For best performance, 6 DIMMs or
12 DIMMs per processor is recommended.
Optimizer population order is not traditional for
8 and 16 DIMMs installations for dual processor.
● For 8 DIMMs: A1, A2, A4, A5, B1, B2, B4, B5
● For 16 DIMMs:
A1, A2, A4, A5, A7, A8, A10, A11
B1, B2, B4, B5, B7, B8, B10, B11
Mirroring population
order
A{1, 2, 3, 4, 5, 6},
B{1, 2, 3, 4, 5, 6},
A{7, 8, 9, 10, 11, 12},
B{7, 8, 9, 10, 11, 12}
Mirroring is supported with 6 or 12 DIMMs per
processor.
Single rank sparing
population order
A{1}, B{1},
A{2}, B{2},
A{3}, B{3},
A{4}, B{4},
A{5}, B{5},
A{6}, B{6}
● DIMMs must be populated in the order
specified.
● Requires two ranks or more per channel.
Multi rank sparing
population order
A{1}, B{1},
A{2}, B{2},
A{3}, B{3},
A{4}, B{4},
A{5}, B{5},
A{6}, B{6}
● DIMMs must be populated in the order
specified.
● Requires three ranks or more per channel.
Fault resilient population
order
A{1, 2, 3, 4, 5, 6},
B{1, 2, 3, 4, 5, 6},
A{7, 8, 9, 10, 11, 12},
B{7, 8, 9, 10, 11, 12}
Supported with 6 or 12 DIMMs per processor.
Quad processor
(Starting with
processor 1,
and processor
1, processor 2,
processor 3,
and processor 4
population should
match)
Optimized population
order (Independent
channel)
A{1}, B{1}, C{1}, D{1},
A{2}, B{2}, C{2}, D{2},
A{3}, B{3} C{3}, D{3},
A{4}, B{4} C{4}, D{4}
Odd number of DIMM population per processor
is allowed.
NOTE: Odd number of DIMMs will result in
unbalanced memory configurations, which
in turn will result in performance loss. It
is recommended to populate all memory
channels identically with identical DIMMs
for best performance.
NOTE: For best performance, 6 DIMMs or
12 DIMMs per processor is recommended.
Optimizer population order is not traditional
for 16 and 32 DIMMs installations for dual
processor.
● For 16 DIMMs:
A1, A2, A4, A5, B1, B2, B4, B5,
C1, C2, C4, C5, D1, D2, D4, D5
● For 32 DIMMs:
Installing and removing sled components 61