Reference Guide

Item
How is data input to this memory?
How is this memory write protected?
Storage Controller Module
(Single PERC)
NVSRAM
ROC writes configuration data to
NVSRAM
Not WP. Not visible to Host Processor
FRU
Programmed at ICT during
production.
Not WP
1-Wire EEPROM ROC writes data to this memory Not WP. Not visible to Host Processor
SPD Pre-programmed before assembly Not WP. Not visible to Host Processor
SBR Pre-programmed before assembly Not WP. Not visible to Host Processor
Flash
Pre-programmed before assembly.
Can be updated using Dell/LSI tools
Not WP. Not visible to Host Processor
ONFI Backup Flash
FPGA backs up DDR data to this
device in case of a power failure
Not WP. Not visible to Host Processor
SDRAM
ROC writes to this memory - using it
as cache for data IO to HDDs
Not WP. Not visible to Host Processor
Storage Controller Module (Dual PERC)
NVSRAM
ROC writes configuration data to
NVSRAM
Not WP. Not visible to Host Processor
FRU
Programmed at ICT during
production.
Not WP
1-Wire EEPROM ROC writes data to this memory Not WP. Not visible to Host Processor
SPD Pre-programmed before assembly Not WP. Not visible to Host Processor
SBR Pre-programmed before assembly Not WP. Not visible to Host Processor
Flash
Pre-programmed before assembly.
Can be updated using Dell/LSI tools
Not WP. Not visible to Host Processor