Reference Guide

BIOS.MemSettings.MemOptimizer (Read or Write)
Description
When set to Disabled, the two DRAM controllers are combined in 128-bit mode and provide optimized
reliability with Advanced ECC Mode. When set to Enabled, the two DRAM controllers operate
independently in 64-bit mode and provide optimized performance without Advanced ECC Mode.Â
Default: Disabled
Has a dependency on DIMM population where corresponding channnels for each socket (Channel0 and
Channel2, Channel1 and Channel 3) needs to be populated and populated idenditally. Not used on 13G+.
Legal Values
● Enabled
● Disabled
Default Value Not Applicable
Write Privilege Server Control
License Required iDRAC Express or iDRAC Enterprise
Dependency Not applicable
BIOS.MemSettings.MemOpVoltage (Read or Write)
Description
Indicates the memory operating voltage.
Legal Values
● AutoVolt
● Volt15V
Default Value Not Applicable
Write Privilege Server Control
License Required iDRAC Express or iDRAC Enterprise
Dependency Not applicable
BIOS.MemSettings.MemoryCapacity (Read or Write)
Description
Total NVDIMM size configured as memory mode in the system.
Legal Values None
Default Value Not Applicable
Write Privilege Server Control
License Required iDRAC Express or iDRAC Enterprise
Dependency Not applicable
BIOS.MemSettings.MemoryInterleaving (Read or Write)
Description
When set to Enabled, memory interleaving is supported if a symmetric memory configuration is installed.
When set to Disabled, the system " supports Non-Uniform Memory Access (NUMA) (asymmetric)
memory configurations. Operating Systems that are NUMA-aware understand the distribution of memory
in a particular system and can intelligently allocate memory in an optimal manner. Operating Systems that
are not NUMA aware could allocate memory to a processor that is not local resulting in a loss of
performance. Die and Socket Interleaving should only be enabled for Operating Systems that are not
NUMA aware.
Legal Values
● Disabled
BIOS Attributes 163