Setup Guide

Buffer Organization
This section describes the buffer organization on the platform.
A single chip architecture can allocate or share all its resource on all the ports. However, the system runs on a different 2x2 chip design.
In this design, all ports are assigned to four port-sets. These sets are built as follows:
• A or B for ingress, referred to as layers
• R or S for egress, referred to as slices
There are 4 XPEs with each XPE containing 4MB of buffer space making the total available buffer space to be 16MB. Out of these 4
XPEs, one of the XPE is used for a particular traffic flow based on its ingress and egress port pipes. For example, if a traffic flow enters
through a port that is a part of the ingress pipe 0 and exits through a port that is part of the egress pipe 0, then XPE A from MMU Slice R
is used. If a traffic flow enters through the pipe 1 and exits through the pipe 3, then XPE B from MMU Slice S is used.
The following example shows default DCB buffer values:
DellEMC#
DellEMC#show dcb
DCB Status: Enabled, PFC Queue Count: 2
Total Buffer: Total available buffer excluding the buffer pre-allocated
for guaranteed services like global headroom, queue's min
guaranteed buffer and CPU queues.
PFC Total Buffer: Maximum buffer available for lossless queues.
PFC Shared Buffer: Buffer used by ingress priority groups for shared usage.
PFC Headroom Buffer: Buffer used by ingress priority group for shared headroom usage.
PFC Available Buffer: Current buffer available for new lossless queues to be
Provisioned.
stack-unit Total Buffer PFC Total Buffer PFC Shared Buffer PFC Headroom Buffer PFC Available
Buffer
PP (KB) (KB) (KB)
(KB) (KB)
----------------------------------------------------------------------------------------------
-------
1 0.0 3399 2656 1040 1040 576
1 0.1 3399 2656 1040 1040 576
1 0.2 3399 2656 1040 1040 576
1 0.3 3399 2656 1040 1040 576
DellEMC#
The default DCB buffer configuration supports 64 PFC lossless queues of 10G interface speed on each of the XPEs. The following table
shows the PFC buffer required for one loss less queue on various supported interface speeds:
Table 17. PFC Buffer required on one Loss Less Queue
Interface Speed PFC Buffer required for 1 lossless queue
10G 54KB
25G 94KB
40G 94KB
50G 161KB
100G 161KB
DCB Buffer value after PFC configuration:
When PFC is configured on a particular port, two XPEs corresponding to the ingress pipe to which the port belongs is updated with the
buffer values. If the port is on the ingress pipe 0 or 3, both the XPE A are updated. Where as, if the port is on ingress pipe 1 or 2, then
both the XPE B are updated.
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Data Center Bridging (DCB)