Reference Guide

Event Message Severity Cause
Memory device was added at
location <location>.
Information This event is generated when memory is
added to the system.
Memory device is removed from
location <location>.
Information This event is generated when memory is
removed from the system.
Unsupported memory
configuration; check memory
device at location
<location>.
Critical This event is generated when memory
configuration is incorrect for the system.
Correctable memory error rate
exceeded for <location>.
Warning This event is generated when correctable
ECC errors have increased from a normal
rate.
Correctable memory error rate
exceeded for <location>.
Critical This event is generated when correctable
ECC errors reach a critical rate.
Memory device at location
<location> is overheating.
Critical This event is generated when system
memory reaches critical temperature.
An OEM diagnostic event
occurred.
Information This event is generated when an OEM
event occurs. OEM events can be used
by the service team to better understand
the cause of the failure.
CPU <number> protocol error
detected.
Critical This event is generated when the
processor protocol enters a non-
recoverable state.
CPU bus parity error
detected.
Critical This event is generated when the
processor bus PERR enters a non-
recoverable state.
CPU <number> initialization
error detected.
Critical This event is generated when the
processor initialization enters a non-
recoverable state.
CPU <number> machine check
error detected.
Critical This event is generated when the
processor machine check enters a non-
recoverable state.
All event logging is
disabled.
Critical This event is generated when all event
logging is disabled.
Logging is disabled.
Critical This event is generated when the ECC
single bit error rate is exceeded.
The system board fail-safe
voltage is outside of range.
Critical This event is generated when the system
board voltages are not at normal levels.
The system board fail-safe
voltage is within range.
Information This event is generated when earlier Fail-
Safe system voltages return to a normal
level.
A hardware incompatibility
detected between BMC/iDRAC
firmware and CPU.
Critical This event is generated when there is a
mismatch between the BMC and iDRAC
firmware and the processor in use or vice
versa.
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