User's Manual

54 omreport: Viewing System Status Using the Instrumentation Service
A Write Policy describes how the cache deals with a write cycle. In a
write-back policy, the cache acts like a buffer. When the processor starts a
write cycle, the cache receives the data and stops the cycle. The cache then
writes the data back to the main memory when the system bus is available.
In a write-through policy, the processor writes through the cache to the main
memory. The write cycle does not complete until the data is stored into the
main memory.
Associativity refers to the way in which main memory content is stored on
the cache.
• A fully associative cache allows any line in main memory to be stored at
any location in the cache.
• A 4-way set-associative cache directly maps four specific lines of memory
to the same four lines of cache.
• A 3-way set-associative cache directly maps three specific lines of memory
to the same three lines of cache.
• A 2-way set-associative cache directly maps two specific lines of memory to
the same two lines of cache.
• A 1-way set-associative cache directly maps a specific line of memory in
the same line of cache.
For example, line 0 of any page in memory must be stored in line 0 of cache
memory.
Cache Device Supported Type is the type of static random access memory
(SRAM) that the device can support.
Cache Device Current Type is the type of the currently installed SRAM that
the cache is supporting.
External Socket Name Silk Screen Name is the name printed on the system
board next to the socket.
Error Correction Type identifies the type of error checking and correction
(ECC) that this memory can perform. Examples are correctable ECC or
uncorrectable ECC.
This report shows cache information for each cache present on the
microprocessor.