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34 Dell HPC System for Manufacturing—System Architecture and Application Performance
The graphs in Figure 26 through Figure 29 show the measured performance of the reference system, on
one to eight EBBs, by using 32–256 cores. Each data point on the graphs records the performance of the
specific benchmark data set by using the number of cores marked on the horizontal axis in a parallel
simulation. The results are divided into four charts for easy readability because some models run much
faster than others depending on the number of cells in the model, type of solver used, and physics of the
problem.
LeMans_100M_Coupled, SlidingMorphingNopostHelicopter, vtmBenchmark_178M and
LeMans_514M_Coupled require two or more servers for sufficient memory capacity. The results for these
cases start with the first valid result obtained for each benchmark problem.
Figure 26 CD-adapco STAR-CCM+ Performance—Explicit BB (1)
0
2
4
6
8
10
12
14
32(1) 64(2) 128(4) 192(6) 256(8)
AverageElapsedTime(lowerisbetter)
NumberofCores(NumberofNodes)
CD‐adapcoSTAR‐CCM+Performance—ExplicitBB
Civil_Trim_20M HlMach10Sou KcsWithPhysics
LeMans_Poly_17M Reactor_9M TurboCharger