Dell General Solution Resources : Reference Guide : Page 2

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The dual socket platform offers an additional level of flexibility to system designers. In the standard

configuration, 128 PCIe Gen4 lanes are available for peripherals. The rest of the lanes are used for

inter-socket communication. Some of these inter-socket xGMI2 lanes can be repurposed to add an

additional 32 lanes. This gives a total of 160 PCIe Gen4 lanes for peripherals (Figure 1). This

flexibility allows for a wide variety of configurations and maximum CPU-peripheral bandwidth.

Figure 1 - Diagram showing PCIe lanes in a 2-socket configuration

Designing for PCIe Gen4

The Next Generation of Dell PowerEdge servers were designed with a new PSU Layout. One of the

key reasons this was done was to simplify enabling PCIe Gen4.

A key element in PCIe performance is the length of PCIe traces. With the new system layout, a main

goal was to shorten the overall PCIe trace lengths in the topology, including traces in the

motherboard. By positioning PSU’s at both edges, the I/O traces to connectors can be shortened for

both processors. This is the optimal physical layout for PCIe Gen 4 and will enable even faster

speeds for future platforms. The shorter PCIe traces translate into better system costs and improved

Signal Integrity for more reliable performance across a broad variety of customer applications.

Another advantage of the split PSU is the balanced airflow that results. The split PSU layout helps

to balance the system airflow, reduce PSU operating temperatures, and allows for PCIe Gen4 card

support and thus an overall more optimal system design layout.

Figure 2 below illustrates how this will look, comparing the 14G series with the next generation of

PowerEdge servers.