White Papers

9 Deep Learning using iAbra stack on Dell EMC PowerEdge Servers with Intel technology
• The NN is then optimised for power and performance using the training data– this can be done in the
datacentre on the Intel ARRIA10 PAC card or an embedded system
• As the next is compact training times are relatively short and the end result is a highly optimised NN that
can be tested and run in the datacentre or an embedded system
Short development time is a key benefit but also the fact that the end result is easier to implement and more
efficient in an embedded system than when using other development flows.
iAbra’s Tools provide an Ecosystem to Target FPGA Silicon for embedded AI Inference.
Targeting FPGA for Neural Network Inference, or embedded AI, requires optimisation at the neural network
training stage and an inference architecture that exploits the inherent advantages available to the FPGA
silicon. These advantages are most valuable in embedded solutions where power, heat, silicon footprint and
environmental harshness are constraint factors.
FPGAs provide the ideal AI inference platform where low size, weight and power are design criteria. The use
of FPGAs in harsh environments where security and ultra-low failure rates are required is well proven, while
the range of FPGA products allows the optimal logic capacity to be selected for an application.
Training a neural network using GPUs and inefficient architectures tends to result in AI models that are too
big and complex for embedded systems where power and silicon resources are constrained. By optimising
the neural network at the training stage, iAbra’s Neural PathWorks ensures the network is of minimal size for
the problem domain provided in the training set, requiring fewer computational operations for inference. This
optimisation effort ensures the network can be stored in the FPGA’s memory and logic elements.
2.2.3 How does iAbra use FPGA?
iAbra’s Neural Synapse exploits the flexibility of the FPGA hardware allowing image data requiring analysis by
the AI inference model to be pipelined from input to output without the need for external memory resources
which increase on-chip and system power consumption. With the performance of the FPGA’s dedicated
computing architecture we can reach an optimal solution for various applications.