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4.2 Intel Programmable Acceleration Card
The Intel Programmable Accelerator Card (PAC) features an Intel Arria
®
10 FPGA, an industry-leading
programmable logic built on 20 nm process technology, integrating a rich feature set of embedded
peripherals, embedded high-speed transceivers, hard memory controllers and IP protocol controllers.
Variable-precision digital signal processing (DSP) blocks integrated with hardened floating point (IEEE 754-
compliant) enable Intel Arria® 10 FPGAs to deliver floating point performance of up to 1.5 TFLOPS. Arria® 10
FPGAs have a comprehensive set of power-saving features. Combined, these features allow developers to
build a versatile set of acceleration solutions.
Figure 5. Intel Programmable Acceleration card
Figure 6. Intel PAC Block Diagram