Owners Manual

Processor Conguration Memory population Memory population information
Optimizer population order is not traditional for 8
and 16 DIMMs installations for dual processor.
• For 8 DIMMs: A1, A2, A4, A5, B1, B2, B4, B5
• For 16 DIMMs:
A1, A2, A4, A5, A7, A8, A10, A11
B1, B2, B4, B5, B7, B8, B10, B11
Mirroring population order
A{1, 2, 3, 4, 5, 6},
B{1, 2, 3, 4, 5, 6},
A{7, 8, 9, 10, 11, 12},
B{7, 8, 9, 10, 11, 12}
Mirroring is supported with 6 or 12 DIMMs per
processor.
Single rank sparing
population order
A{1}, B{1},
A{2}, B{2},
A{3}, B{3},
A{4}, B{4},
A{5}, B{5},
A{6}, B{6}
• DIMMs must be populated in the order
specied.
• Requires two ranks or more per channel.
Multi rank sparing
population order
A{1}, B{1},
A{2}, B{2},
A{3}, B{3},
A{4}, B{4},
A{5}, B{5},
A{6}, B{6}
• DIMMs must be populated in the order
specied.
• Requires three ranks or more per channel.
Fault resilient population
order
A{1, 2, 3, 4, 5, 6},
B{1, 2, 3, 4, 5, 6},
A{7, 8, 9, 10, 11, 12},
B{7, 8, 9, 10, 11, 12}
Supported with 6 or 12 DIMMs per processor.
Quad processor
(Starting with
processor 1, and
processor 1, processor
2, processor 3, and
processor 4 population
should match)
Optimized population order
(Independent channel)
A{1}, B{1}, C{1}, D{1},
A{2}, B{2}, C{2}, D{2},
A{3}, B{3} C{3}, D{3},
A{4}, B{4} C{4}, D{4}
Odd number of DIMM population per processor is
allowed.
NOTE: Odd number of DIMMs will result in
unbalanced memory congurations, which
in turn will result in performance loss. It is
recommended to populate all memory
channels identically with identical DIMMs
for best performance.
Optimizer population order is not traditional for 16
and 32 DIMMs installations for dual processor.
• For 16 DIMMs:
A1, A2, A4, A5, B1, B2, B4, B5,
C1, C2, C4, C5, D1, D2, D4, D5
• For 32 DIMMs:
A1, A2, A4, A5, A7, A8, A10, A11,
B1, B2, B4, B5, B7, B8, B10, B11
C1, C2, C4, C5, C7, C8, C10, C11
D1, D2, D4, D5, D7, D8, D10, D11
Installing and removing system components 83