Owners Manual

Optimizer Mode
This mode supports Single Device Data Correction (SDDC) only for memory modules that use x4 device width. It does not impose any
specic slot population requirements.
• Dual processor: Populate the slots in round robin sequence starting with processor 1.
NOTE: Processor 1 and processor 2 population should match.
Table 28. Memory population rules
Processor Conguration Memory population Memory population information
Single processor Optimizer (Independent channel)
population order
1, 2, 3, 4, 5, 6, 7, 8 Odd amount of DIMMs per processor
allowed.
Mirror population order {1, 2, 3, 4, 5, 6} Mirroring is supported with 6 DIMMs
per processor
Single rank sparing population order 1, 2, 3, 4, 5, 6, 7, 8 Populate in this order, odd amount per
processor allowed. Requires two ranks
or more per channel.
Multi rank sparing population order 1, 2, 3, 4, 5, 6, 7, 8 Populate in this order, odd amount per
processor allowed. Requires three
ranks or more per channel.
Fault resilient population order {1, 2, 3, 4, 5, 6} Supported with 6 DIMMs per
processor.
Dual processor (Start
with processor1.
processor1 and
processor 2 population
should match)
Optimized (Independent channel)
population order
A{1}, B{1}, A{2}, B{2}, A{3}, B{3}
…
Odd amount of DIMMs per processor
allowed.
Mirroring population order
A{1,2,3,4,5,6},
B{1,2,3,4,5,6}
Mirroring is supported with 6 DIMMs
per processor.
Single rank sparing population order A{1}, B{1}, A{2}, B{2}, A{3}, B{3}
…
Populate in this order, odd amount per
processor allowed. Requires two ranks
or more per channel.
Multi rank spare population order A{1}, B{1}, A{2}, B{2}, A{3}, B{3}
…
Populate in this order, odd amount per
processor allowed. Requires three
ranks or more per channel.
Fault resilient population order
A{1,2,3,4,5,6},
B{1,2,3,4,5,6}
Supported with 6 DIMMs per
processor.
60 Installing and removing system components