Setup Guide

Item

How is data input to this memory?

How is this memory write protected?

SEP

Offline programming by factory

Planer

PCH Internal CMOS RAM

BIOS

N/A – BIOS only control

BIOS SPI Flash

SPI interface via PCH

Software write protected

iDRAC SPI Flash

SPI interface via iDRAC

Embedded iDRAC subsystem firmware

actively controls sub area based write

protection as needed.

BMC EMMC

NAND Flash interface via iDRAC

Embedded FW write protected

CPU Vcore and VSA Regulators

Programmed at factory via I2C

No write protect

System CPLD RAM

Not utilized

Not accessible

System Memory

System OS

OS control

Power Supplies

PSU FW

Different vendors have different utilities

and tools to load the data to memory. It

can also be loaded by Dell Update

Package from LC or OS (Windows and

Linux)

Protected by the embedded

microcontroller. Special keys are used by

special vendor provided utilities to unlock

the ROM with various CRC checks during

load.

NOTE:

For any information that you may need, direct your questions to your Dell Marketing contact.

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