Datasheet

Intel
®
Xeon Phi™ Coprocessor Datasheet Document ID Number: 328209 003EN
4
List of Figures
2-1 Intel® Xeon Phi™ Coprocessor Board Schematic..................................................... 9
2-2 Intel® Xeon Phi™ Coprocessor Board Top side (for reference only) ..........................11
2-3 Intel® Xeon Phi™ Coprocessor Board, Back side (reference only).............................11
2-4 Intel® Xeon Phi™ Coprocessor Silicon Layout ........................................................12
2-5 7120D/5120D Dense Form Factor, Topside............................................................14
3-1 Location of Mounting Holes on the Intel® Xeon Phi™ Coprocessor Card (in mils) ........16
3-2 Dimensions of the Intel® Xeon Phi™ Coprocessor Card (in mils) ..............................17
3-3 Entering and Exiting Thermal Throttling (PROCHOT) ...............................................19
3-4 Exploded View of 3120A / 7120A Active Solution....................................................20
3-5 Exploded View of Passive Thermal Solution ...........................................................21
3-6 Airflow Requirement vs. 45oC Inlet Temperature for the 5110P at 225W TDP.............23
3-7 Airflow Requirement vs. Inlet Temperature for the 31S1P at 270W TDP and
SE10P/7120P/3120P at 300W TDP24
3-8 Airflow Requirement vs. Inlet Temperature for the 5110P Card at 245W TDP .............25
3-9 SE10X/7120X Power Profile for Coprocessor Intensive Workload (all values in Watts)..26
3-10 SE10X/7120X Power Profile for Memory Intensive Workload (all values in Watts) .......27
3-11 5120D Power Profile: Coprocessor Centric (all values in Watts) ................................28
3-12 5120D Power Profile: Memory Centric (all values in Watts) ......................................29
3-13 7120D Power Profile: Coprocessor Centric (all values in Watts) ................................30
3-14 7120D Power Profile: Memory Centric (all values in Watts) ......................................31
3-15 7120D/5120D VR Thermal Sensors for Custom Cooling Consideration .......................32
3-16 SE10X/7120X SKU Coprocessor Junction Temperature (Tjunction) vs Power ..............33
3-17 SE10X/7120X SKU Coprocessor Case Temperature (Tcase) vs Power ........................34
3-18 SE10X/7120X Board Top Side..............................................................................36
3-19 SE10X/7120X Board Bottom Side.........................................................................37
3-20 7120D/5120D Board Top Side .............................................................................38
3-21 7120D/5120D Board Bottom Side ........................................................................39
3-22 Contents of Intel® Xeon Phi™ Coprocessor Package Shipment.................................40
3-23 Overlap Lid .......................................................................................................41
3-24 Clearance Lid ....................................................................................................41
3-25 Overlap Lid Removal ..........................................................................................42
3-26 Tilt Overlap Lid and Slide as shown to Disengage Tabs............................................42
3-27 OEM Bracket Installation.....................................................................................43
3-28 OEM Bracket Installation.....................................................................................43
3-29 Replace Lid on “Overlap Lid” Units........................................................................44
3-30 Replace Lid on “Overlap Lid” Units (cont.) .............................................................44
5-1 Coprocessor in C0-state and Memory in M0-state...................................................54
5-2 Some cores are in C0-state and other cores in C1-state; Memory in M0-state ............55
5-3 All Cores In C1 state; Memory In M1 state ............................................................55
5-4 All Cores In Package-C3 State; Memory In M1 .......................................................56
5-5 Package-C3 and Memory M2 state .......................................................................56
5-6 Package-C6 and Memory M2 state .......................................................................57
5-7 Package-C6 and Memory M3 state .......................................................................57
5-8 Intel® Xeon Phi™ coprocessor P-States and Turbo .................................................59
6-1 Intel® Xeon Phi™ Coprocessor System Manageability Architecture ...........................62
6-1 Write Block Command Diagram ...........................................................................68
6-2 Read Block Command Diagram............................................................................69