Specifications

Circuit Diagram
Service Manual
11-13
11.4.1 ASIC
• ARM946ES
- 32-bit RISC embedded processor core
- 16KB instruction cache and 16KB data cache
- No Tightly Coupled Memory
- Memory Protection Unit & CP15 control program
• Dual bus architecture for bus traffic distribution
- AMBA High performance Bus (AHB)
- System Bus with SDRAM
• Printer Video Controller for LBP engines
• Graphic Execution Unit for banding support of Printer Languages
• Printer Video Controller for LBP engines
- PVC : Printer Video Controller without RET Algorithm
- HPVC : Printer Video Controller with RET algorithm
(Line Memory & Lookup Table Memory : 512 x 8 , 4096 x 16)
• Engine Controller
- Motor Control Unit
- Motor Speed Lookup Table Memory (128 x 16 x 2)
- Pulse Width Modulation Unit
- 4 Channels are supported
- ADC Interface Unit
- 3 ADC Channels are available
- ADC Core (ADC8MUX8) maximum clock frequency : 3 MHz
• USB 2.0 Interface
• Package : 272 pins PBGA
• Power : 1.8V(Core), 3.3V(IO) power operation