Specifications

Service Manual
Circuit Diagram
11-10
11.3.2 IP Block Diagram
Crystal
20MHz
CIP4
Oscillation Pad
40MHz
80MHz
SRAM Data
SRAM Address
A/D Converted DataSensor Signal
DMA Request
CPU Address
CPU Data
DMA Acknowledge
Table2
Table1
Table3
Table4
Line
Bufter
CPU
IRQ Ctrl
I/O
Register
Tex DMA
Interface
Sensor
Interface
Image
Engancement
Enlargement/
Reduction
Motor
Control
Vpeak
Control
Gamma
Control
Shading
Acquistion/
Correction
Analog
Front End
Image Sensor
Internal Core
Internal SRAM
External Circuit
Table1: Gamma Table
Table2: IEM Table
Table3: Binary Table
Table4: Motor Table
Extermal
RAM
Control
Binarization
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MHIMRIMMR
CODEC