User guide

P5040 DS Hardware Getting Started, Rev. 1.5
4 Freescale Semiconductor
Acronyms and Abbreviations
eSDHC Enhanced Secure Digital High Capacity Card
esig Internal/Event Signal p. 35
ETH Ethernet
EVEDEST Event Destination
EVESRC Event Source
evt event
FBSEL Feedback Select
FCM NAND Flash Control Machine
FLASHCS Flash Chip Select
Fman Frame Manager
FPGA Field Programmable Gate Array
FSEL Frequency Select
GEN Generate
GETH Giga Ethernet (GbE)
GPINPUT General Purpose Input
GPIO General Purpose In/Out
GVDD Gate Turn-On Voltage / GPIO Voltage
Host P3041/P5020
HRESET Hard Reset
HSTAT Hydra Status
HW Hardware
HWGS Hardware Getting Started
I
2
C Inter-Integrated Circuit Multi-Master Serial Computer Bus
ICS307 System Clock Generator
ID Identification
IDE Integrated Development Environment
IO Input/Output
IPL Initial Program Load
ISOL Isolated
JTAG Joint Test Access Group (IEEE® Std. 1149.1™)
LBMAP Local Bus Map
Table 2.
Usage Description