User guide

P5040 DS Hardware Getting Started, Rev. 1.5
Freescale Semiconductor 3
Acronyms and Abbreviations
CA Core A
CB Core B
CC Core Cluster
CFG Configuration
chkstpi Checkstop In
CLK Clock
CLKIN Clock Input (interchangeable with SYSCLK)
CLKSPREAD Clock Spread
CNTL Control
COP Common On-Chip Processor
CPU Central Processing Unit
CSR Control Status Register
CVDD Clock Driver Supply Voltage / Bus Control Voltage
CW CodeWarrior
DBGSEL FPGA GMSA GMDBG Register Select
DDR Double Data Rate
DIP Dual-In-Line Package (switches)
DIR Direction
DIS Disable
DRAM Dynamic Random Access Memory
DS Development System
EC Chip HW Specification
ECC Error Detection and Correction
eDINK e500 core Demonstrative Interactive Nanokernel
EEPROM Electrically Erasable Programmable ROM
eLBC Enhanced Local Bus Controller
EMI ElectroMagnetic Interference
eMMC Embedded Multi Media Card
EN Enabled
ENG Engineering
EP End Point
Table 2.
Usage Description