Specifications

DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
32 Final
Power Management Control/Status(Xxxxxx54h~PMCSR)
0 R/W
R/W R/W
00000000000
01215 8 7914
PMCSR
Offset=54H
Bit Default Type Description
31:16 0000h RO Reserved
15 0 R/C
_WR
PME_Status
This bit is set when the function would normally assert the PME# signal
independent of the state of the PME_En bit. Writing a “1” to this bit will
clear it.
This bit defaults to “0” if the function does not support PME# generation
from D3(cold).
If the function supports PME# from D3(cold) then this bit is sticky and
must be explicitly cleared by the operating system each time the
operating system is initially loaded.
14:9 000000 RO Reserved.
It means that the DM6588 does not support reporting power
consumption.
8 0 RW
_WR
PME_En
Write “1” to enables the function to assert PME#, write “0” to disable
PME# assertion.
This bit defaults to “0” if the function does not support PME# generation
from D3(cold).
If the function supports PME# from D3(cold) then this bit is sticky and
must be explicitly cleared by the operating system each time the
operating system is initially loaded.
7:2 000000 RO Reserved
1:0 00 RW
_WR
_RD
Power State.
This two bits field is both used to determine the current power state of a
function and to set the function into a new power state. The definitionis
given below.
00 : D0
11 : D3(hot)
PCI function power management state
The DM6588 supports PCI function power states D0,
D3(hot), D3(cold). Additional PCI signal PME# to pin
A19 of the standard PCI connector.
PME Context
PME (power Management Event) context is defined
as the functional state information and logic required
to generate power management events(PMEs),
report PME status, and enable PMEs.
For MODEM, PME context consists of PME_En bit,
PME_Status bit , Ring Detect ,and Ring to PME
circuit.
PCI MODEM Power Management Operation
During a true power-on situation (no auxiliary and
normal power), PME_En = 0 to avoid to assert PME#.
When assert RST#, the pci configuration space is set
to default value except PME context which must
preserve.
Version: DM562P-DS-F01
February 02, 2004