Specifications

DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
28 Final
Revision ID (xxxxxx08 - PCIRV)
31 0
78
Revision IDClass Code
3
4
Class Code
Revision Major Number
Revision Minor Number
Bit Default Type Description
31:8 070002h RO Class Code (070002h)
This is the standard code for Simple Communications controller.16550
compatible serial controler.
7:4 0001 RO
Revision Major Number
This is the silicon-major revision number that will increase for the
subsequent versions of the DM6588
3:0 0000 RO
Revision Minor Number
This is the silicon-minor revision number that will increase for the
subsequent versions of the DM6588.
Miscellaneous Function (Xxxxxx0c - PCILT)
31 16 15 0
872324
BIST Header Type Latency Timer Cache Line Size
Built-In Self Test
Header Type
Latency Timer For The Bus Master
Cache Line Size For Memory Read
Bit Default Type Description
31:24 00h RO Built-In Self Test (=00h Means No Implementation)
23:16 00h RO Header Type (= 00h Means single function with Predefined Header Type )
15:8 00h RO Latency Timer For The Bus Master.
The DM6588 will never support the function.
7:0 00h RO Cacheline Size For Memory Read Mode Selection (00h Means No
Implementation For Use)
Version: DM562P-DS-F01
February 02, 2004