DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in General Description The DM562P integrated modem is a two-chipset design that provides a complete solution for state-of-the-art, voice-band Plain Old Telephone Switching (POTS) communication. The modem provides for Data (up to 56,000bps), Fax (up to 33,600bps), Voice and Full Duplex Speaker-phone functions to comply with various international standards.
DM562P V.
DM562P V.90 integrated Data/ Fax/ Voice/ Speaker Phone Modem Device Single Chip With Memory Built in Features z z Fax - z MNP Class 4 ITU-T V.42 LAPM MNP Class 5 ITU-T V.42bis Voice compression - z ITU-T V.17 (14400, 12000, 9600,7200bps) ITU-T V.29 (9600, 7200bps) ITU-T V.27ter (4800, 2400bps) ITU-T V.21 Channel 2 (300bps) Group III, Class 1 Support ECM mode Data Compression - z ITU-T V.90 (56000 to 28000 bps) ITU-T V.34 (33600 to 2400 bps) ITU-T V.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in Chip 1:Integrated Processor Unit with PnP DM6588 Description The DM6588 MCU performs general modem control functions, and is also designed to provide Plug and Play capability for PCI bus systems. The DM6588 Modem Control Unit is designed for use in high speed internal and external modem applications.
DM562P V.
DM562P V.
DM562P V.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6588 Pin Description Pin Name I/O Description TEST4 I UD0 - UD7 O RxDCLK I RD_SP2 I 19 TXDCLK I 21 DSPTxD I Test pin 4, normal ground. External: N/C (low). PCI: N/C (low). ISA: connect to 3.3V. Modem Control Output, for external modem: Memory address mapping of the controller is E800H. Receive Data Rate Clock:(External) This pin is used as reference clock of DSPRXD pin.
DM562P V.
DM562P V.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6588 Pin Description-ISA Interface only Pin No. 2-5, 9-12 Pin Name UD0-UD3, UD4-UD7 I/O I/O 22-24 UA0-UA2 I 29 /IOWB I 30 /IORB I 31 /CSN I 36 /RST I 78 IRQ O Final Version: DM562P-DS-F01 February 02, 2004 Description Data Bus Signal: These signals are connected to the data bus of the PC (or Host) I/O. They are used to transfer data between the PC and the DM6588.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6588 Pin Description-PCI Interface only Pin No.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in 27 PAR I/O 36 RST# I 76 77 RIN GND_AUX I P Final Version: DM562P-DS-F01 February 02, 2004 PCI Parity This signal indicates even parity across AD0~AD31 and C/BE0#~C/BE3# including the PAR pin. It is stable and valid one clock after the address phase. Reset: An active low signal used to reset the DM6588.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6588 Functional Description 3. Micro-controller Power Down Mode 1. Operating Mode Selection An instruction that sets the register PD (PCON.1) will cause the 80C32 to enter power down mode. There are three ways to wake up the 80C32 (1) Positive pulse signal occurring at the reset pin of the 80C32 (2) Negative pulse occurring at /RI (P1.0) of the 80C32 (3) Programming the PnP Wake Up Controller Register.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in Modem Output Port 2 Register: Address D800H Write only bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 /MUT /PUL /CID E SE These 3 bits control the DM6588 output ports.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in 7. HDLC Description HDLC RxDataBits Register: Address DC00H Write only Once the RxDataBit set to 1, the data in the RxBuffer will be transferred to RxFIFO. The transfer bit number is the same as the programming value of RxDataBits Register. HDLC RxBuffer: Address DC01H Write only Receive data will be written to the RxBuffer and will be input to the RxHDLC circuit. The RxBuffer is 16 bytes wide.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in 1:Indicate end of HDLC frame (clear by a reset action) Bit2: fram ready flag (read only) 1:CRC check ok. 0:CRC check fail.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in and timeout interrupts in the FIFO mode when set to logic 1. Bit 1: This bit enables the Transmitter Holding Register Empty Interrupt when set to logic 1. Bit 2: This bit enables the Receiver Line Status Interrupt when set to logic 1. Bit 3: This bit enables the MODEM Status Interrupt when set to logic 1.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in FIFO Control Register (FCR): Address 2 Reset State 00h , write only bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 RCVR RCVR 0 0 DMA TxFIFO RxFIFO FIFO Trig Trig Mode Reset Reset Enable (MSB) (LSB) This is a write only register at the same location as the IIR, which is a read only register. This register is used to enable the FIFOs, clear the FIFOs, set the RxFIFO trigger level, and select the type of DMA signal.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in Modem Control Register (MCR): Address 4 Reset State 00h bit7 bit6 bit5 0 0 0 bit4 0 bit3 0 bit2 0 bit1 bit0 RTS DTR Bit 0: This bit asserts a Data Terminal Ready condition that is readable via port P1.1 of the micro-controller 80C32. When bit 0 is set to logic 1, the P1.1 is forced to logic 0. When bit 0 is reset to logic 0, the P1.1 is forced to logic 1.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in Modem Status Register (MSR): Address 6 Reset State bit 0-3 : low , bit 4-7: Input Signal bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 DCD RI DSR CTS DDCD TERI DDSR DCTS Scratch Register (SCR): Address 7 Reset State 00h This 8-bit Read/Write Register does not control the UART in any way. It is intended as a Scratch Pad Register to be used by the programmer to hold data temporarily.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in 10. Micro-controller Control Register for PCI interface PCI Vender ID Low Byte Data Port: Address F800H (pci only) byte. (Offset 2E of PCI configuration register space) Write only This port configures PCI Vender ID low byte.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in 11. PCI Configuration Register Definition The definitions of PCI Configuration Registers are based on the PCI specification revision 2.1 and provides the initialization and configuration information to operate the PCI interface in the DM6588. All registers can be accessed with byte, word, or double word mode. As defined in PCI specification 2.
DM562P V.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in Identification ID (xxxxxx00 - PCIID) 31 16 15 0 Dev_ID Vend_ID Device ID Vendor ID Bit 31:16 Default 6588Ah 15:0 1282h Type RO _WR RO _WR Description The field identifies the particular device. Unique and fixed number for the DM6588 is 6588Ah. It is the product number assigned by DAVICOM. This field identifies the manufacturer of the device. Unique and fixed number for Davicom is 1282h.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in 26 Bit 31 Default 0 Type R/C Description Detected Parity Error The DM6588 samples the AD[0:31], C/BE[0:3]#, and the PAR signal to check parity and to set parity errors. 30 0 R/C 29 0 R/C 28 0 R/C 27 0 RO 26:25 10 RO 24 0 R/C 23 0 RO Signaled System Error This bit is set when the SERR# signal is driven by the DM6588.
DM562P V.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in Revision ID (xxxxxx08 - PCIRV) 8 31 7 Class Code 4 3 0 Revision ID Class Code Revision Major Number Revision Minor Number Bit 31:8 Default 070002h Type RO 7:4 0001 RO 3:0 0000 RO Description Class Code (070002h) This is the standard code for Simple Communications controller.16550 compatible serial controler.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in I/O Base Address (Xxxxxx10 - PCIIO) 31 3 2 I/O Base Address 1 0 1 00 I/O Base Address PCI I/O Range Indication I/O or Memory Space Indicator Bit 31:3 Default Undefined Type RW 2:1 00 RO 0 1 RO Description PCI I/O Base Address This is the base address value for I/O access cycles. It will be compared to AD[31:3] in the address phase of bus command cycle for the I/O resource access.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in Capabilities Pointer (Xxxxxx34 - Cap _Ptr) Cap_Ptr 0 1 0 1 0 0 0 0 Offset 34H 7 0 Bit 31:8 7:0 Default 000000h 01010000 Type RO RO Description Reserved Capability Pointer The Cap_Ptr provides an offset (default is 50h) into the function’s PCI Configuration Space for the location of the first term in the Capabilities Linked List.
DM562P V.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in Power Management Control/Status(Xxxxxx54h~PMCSR) PMCSR R/W 0 15 14 0 0 0 Bit 31:16 Default 0000h Type RO 15 0 R/C _WR 14:9 000000 RO 8 0 RW _WR 7:2 000000 RO 1:0 00 RW _WR _RD 0 0 R/W 0 9 8 7 0 0 0 0 R/W 2 1 Offset=54H 0 Description Reserved PME_Status This bit is set when the function would normally assert the PME# signal independent of the state of the PME_En bit.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6588 can not assert PME# from D0. But can Assert PME# from D3(hot) and D3(cold). Hence the Ring to PME# circuit must check the power state. If ring comes at D0 power state, it can not assert PME#. Software will enable its use by setting the PME_En bit in the PMCSR. It must continue to assert PME# until software either clears the PME_En bit or clears the PME_Status bit.
DM562P V.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6588 External Electrical Characteristics DM6588 External Absolute Maximum Ratings* ( 25°C ) Symbol Parameter DVCC,AVCC Supply Voltage VIN DC Input Voltage (VIN) VOUT DC Output Voltage(VOUT) Tc Case Temperature Range Tstg Storage Temperature Rang (Tstg) LT Lead Temp. (TL, Soldering, 10 sec.) Min. -0.3 -0.5 -0.3 0 -65 --- Max. 3.6 5.5 3.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6588 ISA Electrical Characteristics DM6588 ISA Absolute Maximum Ratings* ( 25°C ) Symbol Parameter DVCC,AVCC Supply Voltage VIN DC Input Voltage (VIN) VOUT DC Output Voltage(VOUT) Tc Case Temperature Range Tstg Storage Temperature Rang (Tstg) LT Lead Temp. (TL, Soldering, 10 sec.) Min. -0.3 -0.5 -0.3 0 -65 --- Max. 3.6 5.5 3.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6588 ISA AC Electrical Characteristics & Timing waveforms o DM6588 ISA AC Electrical Characteristics (VDD = 3.3V, GND = 0V; TA = 25 C) Symbol Parameter Min. Typ. Max.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6588 PCI Electrical Characteristics DM6588 PCI Absolute Maximum Ratings* ( 25°C ) Symbol Parameter DVCC,AVCC Supply Voltage VIN DC Input Voltage (VIN) VOUT DC Output Voltage(VOUT) Tc Case Temperature Range Tstg Storage Temperature Rang (Tstg) LT Lead Temp. (TL, Soldering, 10 sec.) Min. -0.3 -0.5 -0.3 0 -65 --- Max. 3.6 5.5 3.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6588 PCI AC Electrical Characteristics & Timing Waveforms (VDD = 3.3V, GND = 0V; Tc = 0℃ to 85℃) PCI Clock Specifications Timing tHIGH 2.0V tLOW 0.8V tR tF tCYCLE Symbol tR tF tCYCLE tHIGH tLOW Parameter PCI_CLK rising time PCI_CLK falling time Cycle time PCI_CLK High Time PCI_CLK Low Time Min. 4 4 30 12 12 Typ. - Max. - Unit ns ns ns ns ns Conditions - Other PCI Signals Timing Diagram 2.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in Chip 2 : DM6580 Analog Front End DM6580 Description The DM6580 is a single chip Analog Front End (AFE) designed to be implemented in voice grade modems for data rates up to 56000bps. The DM6580 is an essential part the complete modem device set. The AFE converts the analog signal into digital form and transfers the digital data to the DSP through the serial port.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6580 Features • • • • • • • 16-bit Σ-△ A/D and D/A converters Dynamic range : 86dB Total harmonic distortion : -86dB Separate transmit and receive clocks Symbol rate : 75, 300, 600, 1200, 1600, 2400, 2743, 2800, 3000, 3200, 3429, 8000Hz Data rate V.34 : 75, 300, 600, 1200, 2400, 4800, 7200, 9600, 12000, 14400, 16800, 19200, 21600, 24000, 26400, 28800, 31200, 33600 bps Data rate V.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6580 Pin Description Pin No.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6580 Functional Description In this chip, we could roughly divide it into two major parts: digital portion and analog portion. The functional blocks are described separately in this section. The analog circuits include a sigma-delta modulator/demodulator, decimation/interpolation filters, a speaker driver, low-pass filter and certain logic circuits.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6580 Absolute Maximum Ratings* Absolute Maximum Ratings* ( 25°C ) Symbol Parameter DVCC,AVCC Supply Voltage VIN DC Input Voltage (VIN) VOUT DC Output Voltage(VOUT) Tc Case Temperature Range Tstg Storage Temperature Rang (Tstg) LT Lead Temp. (TL, Soldering, 10 sec.) Min. -0.5 -0.5 -0.5 0 -65 --- Max. 7.0 5.5 5.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in DM6580 AC Characteristics & Timing Waveforms (VDD = 5V, Tc= 0 oC to 85 oC) Serial Port Timing Symbol Parameter 1 SCLK Period 2 SCLK Low Width 3 SCLK High Width 4 SCLK Rise Time 5 SCLK Fall Time 6 FS To SCLK Setup 7 FS To SCLK Hold 8 DI To SCLK Setup 9 DI To SCLK Hold 10 SCLK High To DO Valid 11 SCLK To DO Hiz Min. 49 24 24 Typ. Max.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in Package Information QFP 128L Outline Dimensions Unit: Inches/mm D D1 102 65 B 103 64 With Plating E1 E C 39 128 Base Metal Detail A 1 38 B A A2 See Detail F θ D A1 y 0.10 y Seating Plane See Detail A Detail F e Symbol Dimension In Inch Dimension In mm A 0.134 Max. 3.40 Max. A1 0.010 Min. 0.25 Min. A2 0.112± 0.005 2.85± 0.12 B 0.009± 0.002 0.22±0.05 C 0.006± 0.002 0.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in LQFP 48L (F.P. 2mm) Outline Dimensions unit: inches/mm y Symbol Dimensions in inches Dimensions in mm Min. Nom. Max. Min. Nom. Max. A - - 0.063 - - 1.60 A1 0.002 - 0.006 0.05 - 0.15 A2 0.053 0.055 0.057 1.35 1.40 1.45 b 0.007 0.009 0.011 0.17 0.22 0.27 b1 0.007 0.008 0.009 0.17 0.20 0.23 C 0.004 - 0.008 0.09 - 0.20 C1 0.004 - 0.006 0.09 - 0.16 D 0.
DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in Ordering Information Part Number DM6580E DM6588F Pin Count 48 128 Package LQFP QFP Disclaimer DAVICOM’s terms and conditions printed on the order acknowledgment govern all sales by DAVICOM. DAVICOM will not be bound by any terms inconsistent with these unless DAVICOM agrees otherwise in writing. Acceptance of the buyer’s orders shall be based on these terms.
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