Specifications

DM562AP
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
Final 9
Version: DM562AP-DS-F03
Nov. 09, 2007
43 43 43 XTAL2 O Crystal Oscillator Output
46 46 46 /PWR O
Controller Program Write Enable:
This pin is used to enable FLASH ROM
programming.
48 48 48 TD_SP1 O
Data Output Pin Of Serial Port 1
The serial data is clocked out through this pin
according to the rising edge of SCLK. The MSB is
sent immediately after the falling edge of the
FR_SP1 signal.
49
47
49
47
49
47
CA16
CA17
O
Bank Switch Control:
These signals are used to switch external program
memory between banks.
CA16 CA17
Bank 0 0 0
Bank 1 1 0
Bank 2 0 1
Bank 3 1 1
51 T0 I Controller Counter 0 Input
52 T1 I Controller Counter 1 Input
57 76 76 /RI I Ring Signal Input
76 57 57 TxSCLK*2 I TxDSP Interrupt 1 Input
58 58 58 /DTR I DTR Input Pin (P1.1)
59 59 59 /OH O Hook Relay Control (P1.2)
60 60 60 /VOICE O
Voice Relay Control. Modem Control Output
(memory map is bit 3 of DAA at memory address
D000H)
61-63 61-63 61-63 EEPROM 1-3 I/O EEPROM Control Pins (P1.4-P1.6)
66 /LCS I
Loop Current Detection. Modem Input Control:
This pin is mapped to bit0 of address D000H.
79 66 66 SCLK I
Reference Clock For Serial Port 1 And Serial
Port 2
68 RXD I Controller Serial Port Data Input
69 TXD O Controller Serial Port Data Output
70 70 70 RxSCLK I
Rx DSP Interrupt 3 Input
71 71 71 /PSEN O
Controller Program Store Enable:
This output goes low during a fetch from external
program memory.
72 72 72 /WR O Controller External Data Memory Write Control
73 73 73 /RD O Controller External Data Memory Read Control
78 DSPRxD O
Modem Received Data :
(External)
Shifted out to the EIA port through this pin
according to the rising edge of RXDCLK.
117 117 117 TEST1
Test pin 1, normal ground
81,82,
83,84,
85,86,
87,88
81,82,
83,84,
85,86,
87,88
81,82,
83,84,
85,86,
87,88
CA15,CA14,
CA13,CA12,
CA11,CA10,
CA9,CA8
O Controller Address Bus