Specifications

DM562AP
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
Command Register Definition:
15 109876543210
Reserved
R/W
0
R/W
00
R/W
R/W R/W0
0
Parity Error Response Enable/Disable
I/O Space Access Enable/Disable
Memory Space Access Enable/Disable
Master Device Capability Enable/Disable
SERR# Driver Enable/Disable
Mast Mode Fast Back-To-Back
Address/Data Steeping
VGA Palette snoop
Special Cycle
Memory Write and Invalid
Bit Default Type Description
15:10 000000 RO Reserved
9 0 RO
Master Fast Back-to-back Mode (0 For No Support)
The DM6588A does not support master mode fast back-to-back capability
and will not generate fast back-to-back cycles.
8 0 RW
SERR# Driver Enable/Disable
This bit controls the assertion of SERR# signal output. The SERR# output
will be asserted on detection of an address parity error and if both this bit
and bit 6 are set.
7 0 RO Address/Data Stepping (0 For No Stepping)
6 0 RW
Parity Error Response Enable/Disable
Setting this bit will enable the DM6588A to assert PERR# on the detection
of a data parity error and to assert SERR# for reporting address parity
error.
5 0 RO VGA Palette Snooping (0 For No Support)
4 0 RO Memory Write and Invalid (0 For No Support)
3 0 RO Special Cycles (0 For No Implementation)
2 0 RW
Master Device Capability Enable/Disable
The DM6588A will never support the function.
1 0 RW
Memory Space Access Enable/Disable
The DM6588A will never support the function.
0 1 RW
I/O Space Access Enable/Disable
This bit controls the ability of I/O space access.
Final 27
Version: DM562AP-DS-F03
Nov. 09, 2007