Datasheet

DTM65538C
1 GB, 240-Pin DDR2 FB-DIMM
Document 06040, Revision A, 29-Sep-10, Dataram Corporation © 2010 Page 14
SDRAM Additive Latencies Supported.
Bit 3 ~ Bit 0. Minimum AL (clocks)- 0
18
Bit 7 ~ Bit 4. AL Range (clocks) - 5
0x50
19 SDRAM Minimum RAS to CAS Delay (tRCD). 12.5ns 0x32
20 SDRAM Minimum Row Active to Row Active Delay (tRRD). 7.5ns 0x1E
21 SDRAM Minimum Row Precharge Time (tRP). 12.5ns 0x32
SDRAM Upper Nibbles for tRAS and tRC.
Bit 3 ~ Bit 0. tRAS Most Significant Nibble -
22
Bit 7 ~ Bit 4. tRC Most Significant Nibble -
0x00
23 SDRAM Minimum Active to Precharge Time (tRAS). 45.0ns 0xB4
24 SDRAM Minimum Active to Active/Refresh Time (tRC). 57.5ns 0xE6
25 SDRAM Minimum Refresh Recovery Time Delay (tRFC), (LSB). 127.5ns 0xFE
26 SDRAM Minimum Refresh Recovery Time Delay (tRFC),
(MSB).
127.5ns 0x01
27 SDRAM Minimum Internal Write to Read Command Delay
(tWTR).
7.5ns 0x1E
28 SDRAM Minimum Internal Read to Precharge Command Delay
(tRTP).
7.5ns 0x1E
SDRAM Burst Lengths Supported
Bit 0. BL = 4 - X
Bit 1. BL = 8 - X
Bit 6 ~ Bit 2.TBD
29
Bit 7. Burst Chop -
0x03
SDRAM Terminations Supported.
Bit 0. 150 ohms ODT - X
Bit 1. 75 ohms ODT - X
Bit 2. 50 ohms ODT - X
30
Bit 6 ~ Bit 3.TBD
0x07
SDRAM Drivers Supported.
Bit 0. Weak Driver -
31
Bit 7 ~ Bit 1. TBD
0x00
SDRAM Average Refresh Interval (tREFI) / Double Refresh mode bit / High Temperature
self-refresh rate support indication.
Bit 0 ~ Bit 3. Average Refresh Interval (tREFI) uS - 7.8
Bit 5, Bit 4. TBD 0
Bit 6. High Temperature Self-Refresh - 1-Required
32
Bit 7. Double Refresh Requirement - 1-Supported
0xC2
Tcasemax Delta.
Bit 3 ~ Bit 0. DT4R4W Delta, Subfield B: 0.4 °C - 0
33
Bit 7 ~ Bit 4. Tcasemax, Subfield A: 2 °C - 10
0x50
34 Thermal Resistance of SDRAM Package. °C/W 58 0x74
SDRAM Case Temperature Rise from Ambient due to Activate-Precharge minus 2.8 °C
offset temperature (DT0). °C
Bit 1, Bit 0. Reserved 0
35
Bit 7 ~ Bit 2. DT0 - 5.4
0x48
36 SDRAM Case Temperature Rise from Ambient due to
Precharge/Quiet
Standby (DT2N/DT2Q). °C
5 0x32