Datasheet

DTM65538C
1 GB, 240-Pin DDR2 FB-DIMM
Document 06040, Revision A, 29-Sep-10, Dataram Corporation © 2010 Page 13
SERIAL PRESENCE DETECT MATRIX
Byte# Function. Value Hex
Number of Serial PD Bytes Written / SPD Device Size / CRC Coverage
Bit 3 ~ Bit 0. SPD Bytes Used - 176
Bit 6 ~ Bit 4. SPD Bytes Total - 256
0
Bit 7. CRC Coverage - Bytes 0-116
0x92
1 SPD Revision Rev. 1.1 0x11
2 Key Byte / DRAM Device Type DDR2 FBDIMM 0x09
Voltage Levels of this Assembly
Bit 3 ~ Bit 0. Power Supply 1 - 1.5V
3
Bit 7 ~ Bit 4. Power Supply 2 - 1.8V
0x12
SDRAM Addressing
Bit 1, 0. Number of Banks - 8
Bit 5 ~ Bit 3.Column Address Bits - 10
4
Bit 7 ~ Bit 5. Row Address Bits - 14
0x45
Module Physical Attributes
Bit 3 ~ Bit 0. Module Thickness (mm) - 7<x<=8.0
Bit 4 ~ Bit 2. Module Height (mm) - 30<x<=35
5
Bit 7, 6. Reserved 0
0x23
Module Type
Bit 3 ~ Bit 0. Module Type - FB-DIMM
6
Bit 7 ~ Bit 4. Reserved 0
0x07
Module Organization
Bit 3 ~ Bit 0. SDRAM Device Width - 8-Bits
Bit 5 ~ Bit 3. Number of Ranks - 1-Rank
7
Bit 7, 6. Reserved 0
0x09
Fine Timebase Dividend / Divisor
Bit 3 ~ Bit 0. Fine Timebase (FTB) Dividend - 0
8
Bit 7 ~ Bit 4. Fine Timebase (FTB) Divisor - 0
0x00
9 Medium Timebase Dividend. 1 (MTB = 0.25ns) 0x01
10 Medium Timebase Divisor. 4 (MTB = 0.25ns) 0x04
11 SDRAM Minimum Cycle Time (tCKmin). 2.5ns 0x0A
12 SDRAM Maximum Cycle Time (tCKmax). 8.0ns 0x20
SDRAM CAS Latencies Supported.
Bit 3 ~ Bit 0. Minimum CL (clocks) - 4
13
Bit 7 ~ Bit 4. CL Range (clocks) - 2
0x24
14 SDRAM Minimum CAS Latency Time (tAAmin). 12.5ns 0x32
SDRAM Write Recovery Times Supported
Bit 3 ~ Bit 0. Minimum WR (clocks) - 2
15
Bit 7 ~ Bit 4. WR Range (clocks) - 3
0x32
16 SDRAM Write Recovery Time (tWR). 15.0ns 0x3C
SDRAM Write Latencies Supported
Bit 3 ~ Bit 0. Minimum WL (clocks) - 2
17
Bit 7 ~ Bit 4. WL Range (clocks) - 4
0x42