Datasheet

DTM63323
1 GB - 128Mx64, 240-Pin Unbuffered DDR2 DIMM
Document 06813, Revision F, 07-JAN-10, Dataram Corporation © 2010 Page 10
34 Data Input Setup Time Before Strobe (tDS) (ns) 0.1 0x10
35 Data Input Hold Time After Strobe (tDH) (ns) 0.17 0x17
36 Write Recovery Time (tWR ) (ns) 15 0x3C
37 Internal write to read command delay (tWTR ) (ns) 7.5 0x1E
38 Internal read to precharge command delay (tRTP ) (ns) 7.5 0x1E
39 Memory Analysis Probe Characteristics. UNUSED 0x00
Extension of Byte 41(tRC) and Byte 42 (tRFC) (ns)
0x00
40
Add this value to byte 41 - 0
Add this value to byte 42 - 0
41 SDRAM Device Minimum Active to Active/Auto Refresh Time (tRC) (ns) 60 0x3C
42
SDRAM Device Minimum Auto-Refresh to Active/Auto-Refresh
Command Period (tRFC). (ns)
105 0x69
43 SDRAM Device Maximum Cycle Time (tCK max). (ns) 8 0x80
44 SDRAM Dev DQS-DQ Skew for DQS & DQ signals (tDQSQ) (ns) 0.24 0x18
45 DDR SDRAM Device Read Data Hold Skew Factor (tQHS) (ns) 0.34 0x22
46 PLL Relock Time (us) UNUSED 0x00
DRAM maximun Case Temperature Delta. (Degree C). 0x00
47 DT4R4W Delta (Bits 0:3) - 0
Tcasemax delta (Bits 7:4) - 0
48
Thermal Resistance of DRAM Package from Top (Case) to Ambient ( Psi T-A
DRAM ). (C/Watt)
UNUSED 0x00
DRAM Case Temperature Rise from Ambient due to Activate-Precharge/
Mode Bits (DT0/Mode Bits). (Degree C).
0x03
49 Bit 0. If "0" Do not need double refresh rate for the proper operation - 1
Bit 1. If "0" DRAM does not support high temperature self-refresh entry. - 1
DT0, (Bits 2:7) - 0
50
DRAM Case Temperature Rise from Ambient due to Precharge/Quiet Standby
(DT2N/DT2Q). (Degree C).
UNUSED 0x00
51
DRAM Case Temperature Rise from Ambient due to Precharge Power-Down
(DT2P). (Degree C).
UNUSED 0x00
52
DRAM Case Temperature Rise from Ambient due to Active Standby (DT3N).
(Degree C).
UNUSED 0x00
53
DRAM Case temperature Rise from Ambient due to Active Power-Down with
Fast PDN Exit (DT3Pfast). (Degree C).
UNUSED 0x00