User's Manual

M2SD50NBT
Datasheet
6
Otherfunctionalityincludesthefollowing:
Feature Description
SystemClocking
(RTCBlock)
AnRTCblockcontrolstheclocksand powergoingtootherinternalmodules.Itsinputs
containsleeprequestsfromthesemodulesanditsoutputscontainclockenableand
powersignalswhichareusedtogatetheclocksgoingtothesemodules.TheRTCblock
alsomanagesresetsgoingtoothermoduleswiththedevice.TheM2SD50NBT’sclockingis
groupedintotwotypes:highspeedandlowspeed.
3.1.1.1 HighSpeedClocking
Thereference26MHzclocksourcedrivesthePLLandRFsynthesizerofWiFiand
Bluetooth.Tominimizepowerconsumption,thereferenceclocksourceispoweredoffin
SLEEP,HOST_OFF,andOFFstates.
3.1.1.2 LowSpeedClocking
Thismodulerequiresanexternalsleepclock(32.768KHz)sourcefromhostplatform
throughpin50ontheNFGGgoldenfinger.ItisusedtoplaceBTintodeepsleepmode.For
WiFionlyapplication,itisnotneeded.
3.1.1.3 InterfaceClock
ThehostinterfaceclockrepresentsanotherclockdomainfortheM2SD50NBT.Thisclock
comesfromtheSDIOandisindependentfromtheotherinternalclocks.Itdrivesthehost
interfacelogicaswellascertainregisterswhichcanbeaccessedbythehostinHOST_OFF
andSLEEPstates.
MAC/BB/RFBlock
TheM2SD50NBTWirelessMACconsistsoffivemajorblocks:
Hostinterfaceunit(HIU)forbridgingtotheAHBforbulkdataaccessesandAPBfor
registeraccesses
Tenqueuecontrolunits(QCU)fortransferringTXdata
TenDCFcontrolunits(DCU)formanagingchannelaccess
Protocolcontrolunit(PCU)forinterfacingtobaseband
DMAreceiveunit(DRU)fortransferringRXdata
BasebandBlock
TheM2SD50NBTbasebandblock(BB)isthephysicallayercontrollerforthe802.11b/g/n
airinterface.
Itmodulatesdatapacketsinthetransmitdirection
Detectsanddemodulatesdatapacketsinthereceivedirection.
Ithasadirectcontrolinterfacetotheradiotoenablehardwaretoadjustanaloggains
andmodesdynamically.
ClockSharing
ClocksharingisimplementedontheM2SD50NBT.TheBluetoothchip(CSR8811)
receivesareferenceclockfromtheWiFichip(QCA6004).WhenWiFiisinpower
off/resetstate,Bluetoothisalsooff.
External32.768KHzsignalpresentonpin50allowstheBTchiptogo
intodeepsleep
modeandconsumelowestamountofpower
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