User's Manual

Datalogic Scanning, Inc

959 Terry Street

Eugene, Oregon 97402

Page 66 10/23/2009

Revision X2

afterwards. However, if a suitable external PA is used it may be possible to ramp the power externally

using the AUX_DAC pin.

This pskey sets the PA/LNA configuration:

0: The two PIO lines are not driven for Tx and Rx. The chip's

internal PA/LNA is used.

1: The two PIO lines are driven high to enable the external PA

and LNA. Tx power ramping is controlled by the internal PA.

2: The two PIO lines are driven high to enable the external PA and LNA. Tx power ramping is controlled

on the external PA via the chip's AUX_DAC pin. The "external_pa" entries in PSKEY_POWER_TABLE

are used.

3: The two PIO lines are driven low to enable the external PA

and LNA. Tx power ramping is controlled by the internal PA.

4: PIO lines driven high for external PA and LNA;

Tx power ramping controlled by internal PA. External PA controlled (not ramped) by chip's

AUX_DAC pin. The "external_pa" entries in PSKEY_POWER_TABLE are used.

5: PIO lines driven high for external PA and LNA; Tx power ramping controlled by internal PA.

External LNA gain controlled by chip's AUX_DAC pin. The AUX_DAC is varied by the AGC between

zero and its maximum in 16 steps.

Hardware restrictions prevent the use of active low PIO pins and external PA ramping.

The behaviour of the chip's AUX_DAC pin is undefined unless this key is set to 2 or 4.