User's Manual

Datalogic Scanning, Inc
959 Terry Street
Eugene, Oregon 97402
Page 13 10/23/2009
Revision X2
The first and second word control basic data rate operation.
1st uint16, lower byte: uint8 external_pa for basic rate
1st uint16, upper byte: uint8 internal_pa for basic rate
2nd uint16: bit 0 controls class 1 and class 2 operation
with a dynamically switchable external PA
(see below). Bits 4 to 6 control the tx_pa_attn
value used BC5 and later chips, and must be zero
on chips earlier chips. Other bits must be zero.
The third and fourth words control enhanced data rate operation. Its form mirrors that of the first and
second words.
3rd uint16, lower byte: uint8 external_pa for enhanced rate
3rd uint16, upper byte: uint8 internal_pa for enhanced rate
On chips prior to BC5, this should be
fixed. Currently the value 63 is
recommended.
4th uint16, lower byte: bit 0 inhibits user of this power with
enhanced data rate (see below). Bits
4 to 6 control the tx_pa_attn value
used on chips which have a TX PA
attenuator, and should be zero
on chips which do not. Other bits must
be zero.
4th uint16, upper byte: uint8 TX-PRE level for enhanced rate
Typically this is 64 greater than the
internal_pa for basic rate (upper byte
of first word). On BC5 and later chips
this value must be zero.
The fifth word specifies the output power common to both data rates.
5th uint16, upper byte: int8 tx dBm
5th uint16, lower byte: set to zero.
If the bottom bit of the second word is set ('EXT PA' bit), operation with dynamically switchable external
PA is assumed.
For any transmission with 'EXT PA' bit set, whether basic rate or enhanced data rate, class 1 logic will be
assumed. The external PA will be used and the AUX_DAC will be set to the lower byte of the first word or
the lower byte of the third word of the entry as appropriate. In addition,
PSKEY_TRANSMIT_OFFSET_CLASS1 and PSKEY_TX_PRE_LVL_CLASS1
are used in place of
PSKEY_TX_OFFSET_HALF_MHZ
(or PSKEY_TRANSMIT_OFFSET) and PSKEY_TX_PRE_LVL.
If entries are present in the power table with the 'EXT PA' bit set, then class 2 operation is assumed for
transmissions in which the 'EXT PA' bit is clear. PIO1 and the AUX_DAC will be pulled low during
transmit. In addition, the PIO given by PSKEY_TX_AVOID_PA_CLASS1_PIO
will be asserted to
indicate such a transmission.
When no entries in the power table have the `EXT PA' bit set, PSKEY_TX_AVOID_PA_CLASS1_PIO
is
not used and the settings given by other PS keys such as PSKEY_TXRX_PIO_CONTROL
are applied