Specifications

TME-EPIC-HURLX-R3V5.docx
Rev 3.5
Page 47 of 49
5.2 I/O Address Map
The system chip set implements a number of registers in I/O address space. These registers occupy the following
map in the I/O space:
Address range (hex) Description
0000 - 000F DMA controller
0020 - 0021 Programmable interrupt controller
002E - 002F Super I/O
0040 - 0043 System timer
0048 - 004B System timer
0060 - 0060 Keyboard
0061 - 0061 System speaker
0064 - 0064 Keyboard
0070 - 0073 System CMOS / Real-time clock
0080 - 008F DMA controller
0092 - 0092 System
00A0 - 00A1 Programmable interrupt controller
00C0 - 00DF DMA controller
00F0 - 00FF Numeric coprocessor
0100 - 017F *PCI-ISA bridge positive decode range 1 (default)
0180 - 01BF *PCI-ISA bridge positive decode range 2 (default)
01C0 - 01DF *PCI-ISA bridge positive decode range 3 (default)
01F0 - 01FF
*IDE controller
0200 - 027F *PCI-ISA bridge positive decode range 4 (default)
0279 - 0279 (ISA-PnP data port)
0290 - 0297 Environment controller
0298 - 029B PME direct access
02F8 - 02FF *Serial port 2
0300 - 033F *PCI-ISA bridge positive decode range 5 (default)
0340 - 035F *PCI-ISA bridge positive decode range 6 (default)
0378 - 037F *Parallel port
03B0 - 03BA VGA
03C0 - 03DF VGA
03F0 - 03F7 Floppy controller
03F8 - 03FF *Serial port 1
0480 - 048F DMA controller
04D0 - 04D1 Programmable interrupt controller
0A79 - 0A79 (ISA-PnP data port)
0CF8 - 0CFF PCI config space
1220 - 1227 Simple-I/O
1228 - 122F SPI flash
1390 - 13FF *DDMA controller
AC1C - AC1F VSA
* Item can be moved or disabled in BIOS Setup
5.3 Interrupts
IRQ System Resource