Specifications

TME-EPIC-HURLX-R3V5.docx
Rev 3.5
Page 28 of 49
3.20 PC/104 Bus Interface (J21)
The PC/104 bus is a modification of the industry standard (ISA) PC bus specified in IEEE P996. The PC/104 bus
has different mechanics than P966 to allow the stacking of modules. The main features are:
• Supports programmable extra wait state for ISA cycles
• Supports I/O recovery time for back-to-back I/O cycles
Pin
1 IOCHCK# GND
2 D7 RSTDRV
3 D6 +5V
se e not e
4 D5 IRQ9
5 D4 -5V
6 D3 DRQ2
7 D2 -12V
see not e
Pin D C 8 D1 ENDXFER
0
GND
GND
9
D0
+12V
1 MEMCS16# SBHE# 10 IOCHRDY KEY
2 IOCS16# LA23 11 AEN SMEMW#
3 IRQ10 LA22 12 A19 SMEMR#
4 IRQ11 LA21 13 A18 IOW#
5 IRQ12 LA20 14 A17 IOR#
6 IRQ15 LA19 15 A16 DACK3#
7 IRQ14 LA18 16 A15 DRQ3
8 DACK0# LA17 17 A14 DACK1#
9
DRQ0
MEMR#
18
A13
DRQ1
10 DACK5# MEMW# 19 A12 REFRESH#
11 DRQ5 SD8 20 A11 SYSCLK
12 DACK6# SD9 21 A10 IRQ7
13 DRQ6 SD10 22 A9 IRQ6
14 DACK7# SD11 23 A8 IRQ5
15 DRQ7 SD12 24 A7 IRQ4
16 +5V SD13 25 A6 IRQ3
17 MASTER# SD14 26 A5 DACK2#
18 GND SD15 27 A4 TC
19 GND GND 28 A3 BALE
29 A2 +5V
30 A1 OSC
31 A0 GND
32 GND GND
+3.3V, +12V and –12V are only routed to connectors for external I/O extension. Their current is limited to 1A each.