Specifications

TME-EPIC-HURLX-R3V5.docx
Rev 3.5
Page 26 of 49
3.18 PC/104-Plus Bus Interface (J22)
The PC/104-Plus bus is a modification of the standard PCI bus. Its main features are:
• PC/104-Plus Bus slot fully compatible with PCI version 2.2 specifications.
• Integrated PCI arbitration interface (32 bit wide, 3.3V).
• Translation of PCI cycles to ISA bus.
• Translation of ISA master initiated cycle to PCI.
• Support for burst read/write from PCI master.
• 33 MHz PCI clock.
Pin A B C D
1 GND Reserved +5 Volts AD00
2
VI/O
AD02
AD01
+5 Volts
3 AD05 GND AD04 AD03
4 C/BE0 AD07 GND AD06
5 GND AD09 AD08 GND
6 AD11 VI/O AD10 M66EN
7 AD14 AD13 GND AD12
8 VBUS C/BE1 AD15 VBUS
9 SERR GND SB0 PAR
10 GND PERR VBUS SDONE
11 STOP VBUS LOCK GND
12 VBUS TRDY GND DEVSEL
13 FRAME GND IRDY VBUS
14 GND AD16 VBUS C/BE2
15 AD18 VBUS AD17 GND
16 AD21 AD20 GND AD19
17
VBUS
AD23
AD22
VBUS
18 IDSEL0 GND IDSEL IDSEL2
19 AD24 C/BE3 VI/O IDSEL3
20 GND AD26 AD25 GND
21 AD29 +5 Volts AD28 AD27
22
+5 Volts
AD30
GND
AD31
23 REQ0 GND REQ1 VI/O
24 GND REQ2 +5 Volts GNT0
25 GNT1 VI/O GNT2 GND
26 +5 Volts CLK0 GND CKL1
27 CLK2 +5 Volts CLK3 GND
28 GND INTD +5 Volts RST
29 +12 Volts INTA INTB INTC
30 -12 Volts REQ3 GNT3 GND
Note
VBUS is connected to 3.3V of J25 (optionally to internal +3.3V)
:
All VIO pins are connected to +3.3V.
The voltages +3.3V, +5V, 12V and –12 V are not generated by the onboard power-
supply but routed from the Micro ATX Connector. The maximum current is limited
to 1.0 amp each.