User manual

Chapter 4 Connecting Signals

GPCTR0_UP_DOWN Signal

This signal can be externally input on the DIO6 pin and is not available as

an output on the I/O connector. The general-purpose counter 0 counts down

when this pin is at a logic low and count up when it is at a logic high. You

can disable this input so that software can control the up-down

functionality and leave the DIO6 pin free for general use.

GPCTR1_SOURCE Signal

Any PFI pin can externally input the GPCTR1_SOURCE signal, which

is available as an output on the PFI3/GPCTR1_SOURCE pin.

As an input, the GPCTR1_SOURCE signal is configured in the

edge-detection mode. You can select any PFI pin as the source for

GPCTR1_SOURCE and configure the polarity selection for either rising

or falling edge.

As an output, the GPCTR1_SOURCE monitors the actual clock connected

to general-purpose counter 1, even if the source clock is being externally

generated by another PFI. This output is set to tri-state at startup.

Figure 4-32 shows the timing requirements for the GPCTR1_SOURCE

signal.

Figure 4-32. GPCTR1_SOURCE Signal Timing

The maximum allowed frequency is 20 MHz, with a minimum pulse width

of 23 ns high or low. There is no minimum frequency limitation.

The 20 MHz or 100 kHz timebase normally generates the

GPCTR1_SOURCE unless you select some external source.

= 23 ns minimum

= 50 ns minimum

UM.book Page 37 Monday, May 14, 2001 10:32 AM