User manual

Chapter 3 Hardware Overview

♦ PXI-6035E/6036E

The RTSI clock connects to other devices through the PXI trigger bus on

the PXI backplane. The RTSI clock signal uses the PXI trigger<7> line for

this connection.

RTSI Triggers

The seven RTSI trigger lines on the RTSI bus provide a very flexible

interconnection scheme for any device sharing the RTSI bus. These

bidirectional lines can drive any of eight timing signals onto the RTSI bus

and can receive any of these timing signals. This signal connection scheme

is shown in Figure 3-3 for the PCI-6034E/6035E/6036E and in Figure 3-4

for the PXI-6035E/6036E.

Figure 3-3. PCI RTSI Bus Signal Connection

RTSI Bus Connector

Switch

RTSI Switch

Clock

Trigger

DAQ-STC

TRIG1

TRIG2

CONVERT*

UPDATE*

WFTRIG

GPCTR0_SOURCE

GPCTR0_GATE

GPCTR0_OUT

STARTSCAN

AIGATE

SISOURCE

UISOURCE

GPCTR1_SOURCE

GPCTR1_GATE

RTSI_OSC (20 MHz)

UM.book Page 7 Monday, May 14, 2001 10:32 AM