User manual

Module, then you may map the DAI any way you want on the Interconnect Port. We expect that
future dspstak DSP Engines will also have DAI mapped connections routed to the same connections
on the Interconnect Port.
Here are the DAI to Interconnect Port Mappings:
Row A&C B Name 21262sx Notes
1 * * AGND Analog Ground
2 * * Va+ Unregulated Positive Analog Supply
3 * * Va- Unregulated Negative Analog Supply
4 * * Va+5 Regulated Analog +5.0 Volt Supply
5 * * AGND Analog Ground
6 * * Vd+5 Digital 5.0 Volt Supply
7 * * Vd+3.3 Digital 3.3 Volt Supply
8 * * DGND Digital Ground – Main Return
9 * LED0 PLD 3.3V Digital Output
9 * LED1 PLD 3.3V Digital Output
10 * LED2 PLD 3.3V Digital Output
10 * LED3 PLD 3.3V Digital Output
11 * LED4 PLD 3.3V Digital Output
11 * IO5 (#SPISS1) DAI 2 (IO5 is alternate function with #SPISS1)
12 * IO6 (#SPISS2) DAI 3 (IO6 is alternate function with #SPISS2)
12 * IO7 (#SPISS3) DAI 1 (IO7 is alternate function with #SPISS3)
13 * #SPI_SS PLD Primary SPI Slave Select
13 * SPICLK SPI Clock – DSP Engine is Master
14 * SPISO SPI Serial Out (MISO)
14 * SPISI SPI Serial In (MOSI)
15 * IRQ DAI 4
15 * #RESET PLD
16 * SYSCLKIN External DSP Clock Input
16 * SYSCLKOUT Programmable clock
17 * Vd+3.3 SPORT 0 – Full Duplex
17 * GND
18 * DRA0 DAI 5
18 * DTA0 DAI 6
19 * GND
19 * MCLK0 Programmable Clock
dspstak™ 21262sx User Manual Page 11