User`s manual

PC2-CamLink User's Manual Part I: PC2-CamLink Board • 31
other words, +5V is connected to Ext_Trig+ and the sink trigger source is connected to Ext_Trig-.
This will normally require the application the invert the polarity of the trigger in the camera
configuration file.
Many TTL devices will not supply enough current to reliably drive the Ext_Trig+ of an opto-coupled
input; a buffer is needed between the TTL output and the Ext_Trig+ input. One possibility is a CMOS
buffer with TTL compatible inputs, such as the 74AC240 (inverting buffer) or 74AC241 (non-
inverting buffer). These devices can supply up to 24mA at close to the supply voltage. The other
alternative is to connect your TTL device to Ext_Trig- and connect a +5V pull-up to Ext_Trig+ as
mentioned above.
Pinout:
Positive side (anode) Negative side (cathode)
Opto trigger 1
DB-15, pin 1 DB-15, pin 9
Opto trigger 2
DB-15, pin 2 DB-15, pin 10
LVDS
LVDS (Low Voltage Differential Signaling) uses low-voltage dual-wire systems running 180° apart.
This enables noise to travel at the same level, which in turn can get filtered out more easily and
effectively.
Two LVDS trigger inputs are available on PC2-CamLink (for a total of 4 pins). These inputs are
typically implemented using the National Semiconductor DS90LV028A LVDS line receiver or a
compatible device.
Pinout:
Positive line Negative line
LVDS trigger 1
DB-15, pin 4 DB-15, pin 11
LVDS trigger 2
DB-15, pin 5 DB-15, pin 12
SW Trigger
A software trigger is available to programmatically control the trigger event. This is generated by a
function call from the application.
User Timer
The PC2-CamLink offers a user timer that can be used to fire a frame acquisition at a specified frame
rate. Note that the user timer is asynchronous to all input pins.
The user timer has a minimum frequency of 0.1Hz and a maximum frequency of 10kHz with a step
size of 0.1Hz.