Specifications

Gigabit Multimedia Serial Link Deserializer
with LVDS System Interface
MAX9268
22 _____________________________________________________________________________________
Interfacing Command-Byte-Only I
2
C Devices
The GMSL serializer and MAX9268 UART-to-I
2
C
conversion interfaces with devices that do not require
register addresses, such as the MAX7324 GPIO expand-
er. In this mode, the I
2
C master ignores the register
address byte and directly reads/writes the subsequent
data bytes (Figure 21). Change the communication
method of the I
2
C master using the I2CMETHOD bit.
I2CMETHOD = 1 sets command-byte-only mode, while
I2CMETHOD = 0 sets normal mode where the first byte
in the data stream is the register address.
Bypass Mode
In bypass mode, the GMSL serializer/MAX9268 ignore
UART communications. The FC is thereby free to
communicate with the peripherals using its own UART
protocol without concern that communication traffic
inadvertently misprograms the GMSL serializer or
MAX9268. The FC cannot access the GMSL serializer/
MAX9268 registers in this mode. Peripherals accessed
through the forward control channel using the UART
interface need to handle at least one TXCLKOUT_ period
of jitter due to the asynchronous sampling of the UART
signal by TXCLKOUT_.
Set MS = high to put the control channel into bypass
mode. For applications with the FC connected to the
deserializer (CDS is high), there is a 1ms wait time
between setting MS high and the bypass control channel
being active. There is no delay time when switching to
bypass mode when the FC is connected to the serializer
(CDS = low). Bypass mode accepts bit rates down to
28kbps in the forward direction (serializer to deserial-
izer), and 7.7kbps in the reverse direction (deserializer to
serializer). See the Interrupt Control section for interrupt
functionality limitations. The control-channel data pattern
should not be held low longer than 100µs if interrupt
control is used.
Interrupt Control
The INT pin of the GMSL serializer is the interrupt output
and the INT pin of the MAX9268 is the interrupt input.
The interrupt output on the GMSL serializer follows the
transitions at the interrupt input, even during reverse-
channel communication or loss of lock. This interrupt
function supports remote-side functions such as touch-
screen peripherals, remote power-up, or remote moni-
toring. Interrupts that occur during periods where the
reverse control channel is disabled, such as link startup/
shutdown, are automatically resent once the reverse
control channel becomes available again. Bit D4 of
register 0x06 in the MAX9268 also stores the interrupt
input state. The INT output of the GMSL serializer is low
after power-up. In addition, the FC can set the INT output
of the serializer by writing to the SETINT register bit. In
normal operation, the state of the interrupt output
changes when the interrupt input on the MAX9268 toggles.
Do not send a logic-low value longer than 100Fs in
either base or bypass mode to ensure proper interrupt
functionality.
Figure 21. Format Conversion Between GMSL UART and I
2
C with Register Address (I2CMETHOD = 1)
: MASTER TO SLAVE
GMSL SERIALIZER/MAX9268
GMSL SERIALIZER/MAX9268
GMSL SERIALIZER/MAX9268
UART-TO-I
2
C CONVERSION OF READ PACKET (I2CMETHOD = 1)
UART-TO-I
2
C CONVERSION OF WRITE PACKET (I2CMETHOD = 1)
FC
GMSL SERIALIZER/MAX9268FC
SYNC FRAME
11 11 11 11 11 11 11
1111 11 11 11 11 11
DEVICE ID + RD REGISTER ADDRESS NUMBER OF BYTES
SYNC FRAME DEVICE ID + WR REGISTER ADDRESS NUMBER OF BYTES DATA 0 DATA N ACK FRAME
ACK FRAME DATA 0 DATA N
DATA NADATA 0W ADEV IDS A P
PERIPHERAL
PERIPHERAL
S
1 1 1 8
8 81111 7 1 1
8
1 1 17
DEV ID R A A A PDATA 0 DATA N
: SLAVE TO MASTER S: START P: STOP A: ACKNOWLEDGE