Specifications

44 Maxim Integrated
HDCP Gigabit Multimedia Serial
Link Serializer/Deserializer
MAX9263/MAX9264
Table 13. Startup, HDCP Authentication, and Normal Operation (Deserializer is not a
Repeater)—First Part of the HDCP Authentication Protocol (continued)
Table 14. Link Integrity Check (Normal)—Performed Every 128 Frames After Encryption
is Enabled
NO. µC SERIALIZER DESERIALIZER
8
Reads the BKSV and REPEATER bit from the deserializer
and writes to the serializer.
Generates R0, triggered by
the FC’s write of BKSV.
—
9
Reads the INVALID_BKSV bit of the serializer and
continues with authentication if it is 0. Authentication can be
restarted if it fails (set RESET_HDCP = 1 before restarting
authentication).
— —
10
Reads R0’ from the deserializer and reads R0 from the
serializer. If they match, continues with authentication;
otherwise, retries up to two more times (optionally, the
serializer comparison can be used to detect if R0/R0’
match). Authentication can be restarted if it fails (set the
RESET_HDCP = 1 before restarting authentication).
— —
11
Waits for the VSYNC falling edge (internal to the serializer)
and then sets the ENCRYPTION_ENABLE bit to 1 in the
deserializer and the serializer (if the FC is not able to
monitor VSYNC, it can utilize the VSYNC_DET bit in the
deserializer).
Encryption is enabled after
the next VSYNC falling
edge.
Decryption is enabled after
the next VSYNC falling
edge.
12
Checks that BKSV is not in the Key Revocation list and
continues if it is not. Authentication can be restarted if it fails.
Note: Revocation list check can start after BKSV is read in
step 8.
— —
13 Starts transmission of A/V content that needs protection.
Performs HDCP encryption
on high-value content A/V
data.
Performs HDCP decryption
on high-value content A/V
data.
NO.
µC SERIALIZER DESERIALIZER
1
—
Generates Ri and updates
the RI register every 128
VSYNC cycles.
Generates Ri’ and updates
the RI’ register every 128
VSYNC cycles.
2
—
Continues to encrypt and
transmit A/V data.
Continues to receive, decrypt,
and output A/V data.
3
Every 128 video frames (VSYNC cycles) or every 2s. — —
4
Reads RI from the serializer. — —
5
Reads RI’ from the deserializer. — —
6
Reads RI again from the serializer and ensures it is
stable (matches the previous RI that it has read from the
serializer). If RI is not stable, go back to step 5.
— —
7
If RI matches RI’, link integrity check is successful, go
back to step 3.
— —