Specifications

29Maxim Integrated
HDCP Gigabit Multimedia Serial
Link Serializer/Deserializer
MAX9263/MAX9264
HDCP Bitmapping and Bus-Width Selection
The parallel input/outputs have two selectable modes,
24-bit mode and 32-bit mode. In 24-bit mode, DIN[28:21]
are not available. For both modes, the SD, SCK, and WS
pins are for I
2
S audio. The serializer/deserializer use
pixel clock rates from 8.33MHz to 104MHz for 24-bit
mode and 6.25MHz to 78MHz for 32-bit mode.
Table 1 lists the HDCP bit mapping for the parallel inputs.
DIN18/HS and DIN19/VS are reserved for HSYNC and
VSYNC, respectively. The serializer/deserializer have
HDCP encryption on DIN[17:0] and the I
2
S input. 32-bit
mode has additional HDCP encryption on DIN[26:21].
DIN[28:27] and DIN20 do not have HDCP encryption. SD,
when used as an additional data input (AUDIOEN = 0),
also does not have HDCP encryption.
Serial Link Signaling and Data Format
The serializer uses CML signaling with programmable
pre/deemphasis and AC-coupling. The deserializer uses
AC-coupling and programmable channel equalization.
Together, the GMSL link can operate at full speed over
STP cable lengths to 15m or more.
The serializer scrambles and encodes the input data and
sends the 8b/10b coded signal through the serial link.
The deserializer recovers the embedded serial clock and
then samples, decodes, and descrambles before out-
putting the data. Figures 22 and 23 show the serial-data
packet format after unscrambling and 8b/10b decoding.
In 24-bit or 32-bit mode, 21 or 29 bits map to the paral-
lel outputs. The audio channel bit (ACB) contains an
encoded audio signal derived from the three I
2
S signals
(SD, SCK, and WS). The forward control channel (FCC)
Table 1. HDCP Mapping and Bus Width Selection
Figure 22. 24-Bit Mode Serial Link Data Format
*Bit assignments of DIN[28:0] are interchangeable if HDCP is not used.
**HDCP encryption on SD when used as an I
2
S signal.
DIN0
R0
RGB DATA CONTROL BITS
AUDIO
CHANNEL
BIT
FORWARD
CONTROL-
CHANNEL BIT
PACKET
PARITY
CHECK BIT
R1
DIN1 DIN17
B5 HS VS DE
24 BITS
DIN18 DIN19 DIN20 ACB FCC PCB
NOTE: LOCATIONS OF THE RGB DATA ARE INTERCHANGABLE
ACCORDINGLY ON BOTH SIDES OF THE LINK.
ONLY DIN[17:0], AND ACB HAVE HDCP ENCRYPTION.
INPUT BITS
24-BIT MODE (BWS = LOW) 32-BIT MODE (BWS = HIGH)
HDCP MAPPING*
HDCP ENCRYPTION
CAPABILITY
HDCP MAPPING*
HDCP ENCRYPTION
CAPABILITY
DIN[17:0] RGB Yes RGB Yes
DIN18/HS HS No HS No
DIN19/VS VS No VS No
DIN20 DE No DE No
DIN[26:21] Not Available — RGB Yes
DIN[28:27] Not Available — CNTL No
SD SD I
2
S** SD I
2
S**