Specifications

22 Maxim Integrated
HDCP Gigabit Multimedia Serial
Link Serializer/Deserializer
MAX9263/MAX9264
Figure 5. Serializer Parallel Input Clock Requirements
Figure 6. I
2
C Timing Parameters
Figure 7. Serializer Differential Output Template
V
IL MAX
t
HIGH
t
LOW
t
T
t
R
t
F
V
IH MIN
PCLKIN
PROTOCOL
SCL
SDA
START
CONDITION
(S)
BIT 7
MSB
(A7)
BIT 6
(A6)
BIT 0
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
V
IOVDD
x 0.7
V
IOVDD
x 0.3
V
IOVDD
x 0.7
V
IOVDD
x 0.3
t
SU;STA
t
LOW
t
HIGH
t
BUF
t
HD;STA
t
r
t
SP
t
f
t
SU;DAT
t
HD;DAT
t
VD;DAT
t
VD;ACK
t
SU;STO
1/f
SCL
800mV
P-P
t
TSOJ1
2
t
TSOJ1
2