Programmable Embedded USB Host and Peripheral Controller with Automotive AEC Grade Support Specification Sheet
Table Of Contents
- EZ-Host Features
- Typical Applications
- Introduction
- Functional Overview
- Interface Descriptions
- USB Interface
- OTG Interface
- External Memory Interface
- General Purpose IO Interface (GPIO)
- UART Interface
- I2C EEPROM Interface
- Serial Peripheral Interface
- High-Speed Serial Interface
- Programmable Pulse/PWM Interface
- Host Port Interface
- IDE Interface
- Charge Pump Interface
- Booster Interface
- Crystal Interface
- Boot Configuration Interface
- Operational Modes
- Power Savings and Reset Description
- Memory Map
- Registers
- Processor Control Registers
- CPU Flags Register [0xC000] [R]
- Bank Register [0xC002] [R/W]
- Hardware Revision Register [0xC004] [R]
- CPU Speed Register [0xC008] [R/W]
- Power Control Register [0xC00A] [R/W]
- Interrupt Enable Register [0xC00E] [R/W]
- Breakpoint Register [0xC014] [R/W]
- USB Diagnostic Register [0xC03C] [R/W]
- Memory Diagnostic Register [0xC03E] [W]
- External Memory Registers
- Timer Registers
- General USB Registers
- USB Host Only Registers
- Host n Control Register [R/W]
- Host n Address Register [R/W]
- Host n Count Register [R/W]
- Host n Endpoint Status Register [R]
- Host n PID Register [W]
- Host n Count Result Register [R]
- Host n Device Address Register [W]
- Host n Interrupt Enable Register [R/W]
- Host n Status Register [R/W]
- Host n SOF/EOP Count Register [R/W]
- Host n SOF/EOP Counter Register [R]
- Host n Frame Register [R]
- USB Device Only Registers
- Device n Endpoint n Control Register [R/W]
- Device n Endpoint n Address Register [R/W]
- Device n Endpoint n Count Register [R/W]
- Device n Endpoint n Status Register [R/W]
- Device n Endpoint n Count Result Register [R/W]
- Device n Port Select Register [R/W]
- Device n Interrupt Enable Register [R/W]
- Device n Address Register [W]
- Device n Status Register [R/W]
- Device n Frame Number Register [R]
- Device n SOF/EOP Count Register [W]
- OTG Control Registers
- GPIO Registers
- IDE Registers
- HSS Registers
- HSS Control Register [0xC070] [R/W]
- HSS Baud Rate Register [0xC072] [R/W]
- HSS Transmit Gap Register [0xC074] [R/W]
- HSS Data Register [0xC076] [R/W]
- HSS Receive Address Register [0xC078] [R/W]
- HSS Receive Counter Register [0xC07A] [R/W]
- HSS Transmit Address Register [0xC07C] [R/W]
- HSS Transmit Counter Register [0xC07E] [R/W]
- HPI Registers
- SPI Registers
- SPI Configuration Register [0xC0C8] [R/W]
- SPI Control Register [0xC0CA] [R/W]
- SPI Interrupt Enable Register [0xC0CC] [R/W]
- SPI Status Register [0xC0CE] [R]
- SPI Interrupt Clear Register [0xC0D0] [W]
- SPI CRC Control Register [0xC0D2] [R/W]
- SPI CRC Value Register [0xC0D4] [R/W]
- SPI Data Register [0xC0D6] [R/W]
- SPI Transmit Address Register [0xC0D8] [R/W]
- SPI Transmit Count Register [0xC0DA] [R/W]
- SPI Receive Address Register [0xC0DC [R/W]
- SPI Receive Count Register [0xC0DE] [R/W]
- UART Registers
- PWM Registers
- Processor Control Registers
- Pin Diagram
- Pin Descriptions
- Absolute Maximum Ratings
- Operating Conditions
- Crystal Requirements (XTALIN, XTALOUT)
- DC Characteristics
- AC Timing Characteristics
- Register Summary
- Ordering Information
- Package Diagrams
- Document History Page
- Sales, Solutions, and Legal Information
CY7C67300
Document #: 38-08015 Rev. *J Page 94 of 99
R/W 0xC07E HSS Transmit Counter Reserved Counter... 0000 0000
...Counter 0000 0000
R/W 0xC080
0xC0A0
Host n Control Reserved 0000 0000
Preamble
Enable
Sequence
Select
Sync
Enable
ISO
Enable
Reserved Arm
Enable
0000 0000
R/W 0xC082
0xC0A2
Host n Address Address... 0000 0000
...Address 0000 0000
R/W 0xC084
0xC0A4
Host n Count Reserved Port Select Reserved Count... 0000 0000
...Count 0000 0000
R/W 0xC084
0xC0A4
Device n Port Select Reserved Port Select Reserved... 0000 0000
...Reserved 0000 0000
R 0xC086
0xC0A6
Host n PID Reserved Overflow
Flag
Underflow
Flag
Reserved 0000 0000
Stall
Flag
NAK
Flag
Length
Exception Flag
Reserved Sequence
Status
Timeout
Flag
Error
Flag
ACK
Flag
0000 0000
W 0xC086
0xC0A4
Host n EP Status Reserved 0000 0000
PID Select Endpoint Select 0000 0000
R 0xC088
0xC0A8
Host n Count Result Result... 0000 0000
...Result 0000 0000
W 0xC088
0xC0A8
Host n Device Address Reserved... 0000 0000
...Reserved Address 0000 0000
R/W 0xC08A
0xC0AA
USB n Control Port B
D+ Status
Port B
D– Status
Port A
D+ Status
Port A
D– Status
LOB LOA Mode
Select
Port B Resis-
tors Enable
xxxx 0000
Port A
Resistors
Enable
Port B
Force D+/-
State
Port A
Force D±
State
Suspend
Enable
Port B
SOF/EOP
Enable
Port A
SOF/EOP
Enable
0000 0000
R/W 0xC08C Host 1 Interrupt Enable VBUS
Interrupt
Enable
ID
Interrupt
Enable
Reserved SOF/EOP
Interrupt
Enable
Reserved 0000 0000
Port B
Wake Interrupt
Enable
Port A
Wake Interrupt
Enable
Port B Connect
Change
Interrupt En-
able
Port A Con-
nect Change
Interrupt
Enable
Reserved Done
Interrupt
Enable
0000 0000
R/W 0xC08C Device 1 Interrupt Enable VBUS
Interrupt
Enable
ID
Interrupt
Enable
Reserved SOF/EOP
Timeout In-
terrupt En-
able
Reserved SOF/EOP
Interrupt
Enable
Reset
Interrupt
Enable
0000 0000
EP7
Interrupt
Enable
EP6
Interrupt
Enable
EP5
Interrupt
Enable
EP4
Interrupt
Enable
EP3
Interrupt
Enable
EP2
Interrupt
Enable
EP1
Interrupt
Enable
EP0
Interrupt
Enable
0000 0000
R/W 0xC08E
0xC0AE
Device n Address Reserved... 0000 0000
...Reserved Address 0000 0000
R/W 0xC090 Host 1 Status VBUS
Interrupt Flag
ID
Interrupt Flag
Reserved SOF/EOP
Interrupt Flag
Reserved xxxx xxxx
Port B
Wake Interrupt
Flag
Port A
Wake Interrupt
Flag
Port B Connect
Change
Interrupt Flag
Port A Con-
nect Change
Interrupt Flag
Port B
SE0
Status
Port A
SE0
Status
Reserved Done
Interrupt
Flag
xxxx xxxx
R/W 0xC090 Device 1 Status VBUS
Interrupt Flag
ID
Interrupt Flag
Reserved SOF/EOP
Interrupt Flag
Reset
Interrupt Flag
xxxx xxxx
EP7
Interrupt Flag
EP6
Interrupt Flag
EP5
Interrupt Flag
EP4
Interrupt Flag
EP3
Interrupt Flag
EP2
Interrupt Flag
EP1
Interrupt Flag
EP0
Interrupt Flag
xxxx xxxx
R/W 0xC092
0xC0B2
Host n SOF/EOP Count Reserved Count... 0010 1110
...Count 1110 0000
R 0xC092
0xC0B2
Device n Frame Number SOF/EOP
Timeout
Flag
SOF/EOP
Timeout
Interrupt Count
Reserved Frame... 0000 0000
...Frame 0000 0000
R 0xC094
0xC0B4
Host n SOF/EOP Counter Reserved Counter... xxxx xxxx
...Counter xxxx xxxx
W 0xC094
0xC0B4
Device n SOF/EOP Count Reserved Count... 0010 1110
...Count 1110 0000
R 0xC096
0xC0B6
Host n Frame Reserved Frame... 0000 0000
...Frame 0000 0000
R/W 0xC0AC Host 2 Interrupt Enable Reserved SOF/EOP
Interrupt
Enable
Reserved 0000 0000
Port B
Wake Interrupt
Enable
Port A
Wake Interrupt
Enable
Port B Connect
Change
Interrupt
Enable
Port A Con-
nect Change
Interrupt
Enable
Reserved Done
Interrupt
Enable
0000 0000
Table 142. Register Summary (continued)
R/W Address Register Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Default High
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default Low
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