Data Sheet

CINT
PRELIMINARY
CYSBSYS-RP01
Overview
Functional Block Diagram
Figure 1. Functional Block Diagram
PSo C 6 MCU
CMOD
CINT
32 kHz
Oscillat or
DualBand
Radio
2G TX
2G RX
BT
5G TX
5G RX
2G SP3T
5G SP3T
2 G
5G
Diplexer
RF
Matching
Netwo rk
ANT
VDDUSB
VDDA, VDDIO1
VDDIO0
VDD_NS, VDDD,
VDDIO2,VBACKUP
1.83. 3V
1.8V/ 2 .5V
1.8V
54 I/ Os
XRES
Po wer and
PSoC IOs
(0.8m m
caste llated p ads)
SDIO, UART,
Co ntr ol
VDDIO
VBAT
UM C
Conn e cto r
CYSBSYS-RP01 provides GPIO of PSoC 6 MCU via castellated solder pads. It has onboard connection between PSoC 6 MCU and
single-chip, ultra-low-power, IEEE 802.11n-compliant, IEEE 802.11ac-friendly Wi-Fi with integrated Bluetooth
®
5.0 radio.
CYSBSYS-RP01 has an onboard dual-band chip antenna Wi-Fi / BT and u.FL connector (CYSBSYS-RP01-UFL) for external antenna
connection. CYSBSYS-RP01 has an onboard 32-kHz oscillator for the WCO of PSoC 6 MCU and the radio Wi-Fi sleep clock. It has
the modulation and integration capacitors required for capacitive sensing. Furthermore, it has the diplexer and RF switches required
for RF functionality.
CYSBSYS-RP01 is a complete hardware solution designed to be soldered to the applications main board. It provides a certified system
for customers to design their end solutions.
Figure 2. Key Components
Chip Antenna
Antenna Matching
Network
Diplexer
SP3T 5G
SP3T 5G
Dua lband
802.11a c frie n d ly
with BT 5.0
Radio Crystal
37.4 MHz
CMOD
UMC Connector
(No Load)
CINT
Soldering PADs for
RF Shield
PSoC 6 MCU
0.8-mm Castellated
Pads
LPO 32 kHz
Document Number: 002-29368 Rev. *C Page 3 of 22
SDIO (6 I/ Os) / UART (4 I/ Os) /
Co ntr ol (6 I/ Os)
1.83. 3V
1.8V
3.6V