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PRELIMINARY CYSBSYS-RP01 Rapid IoT Connect CYSBSYS-RP01, Rapid IoT Connect General Description The SubSystems CYSBSYS-RP01 Rapid IoT Connect module is the easiest way to provide a secure, scalable, and reliable connection from your device to your cloud. CYSBSYS-RP01 is a pre-certified 802.11ac-friendly dual-band (2.4 and 5.0 GHz) Wi-Fi and Bluetooth 5.0-compliant combo radio module.
PRELIMINARY CYSBSYS-RP01 Contents Overview............................................................................ 3 Functional Block Diagram ............................................... 3 PSoC 6 MCU...................................................................... 4 Dual-band 802.11ac-friendly Radio with BT 5.0............. 4 Crystal and Oscillators .................................................... 4 Chip Antenna for Wi-Fi / BT and u.FL Connector (CYSBSYS-RP01) .............................
PRELIMINARY CYSBSYS-RP01 Overview Functional Block Diagram Figure 1. Functional Block Diagram 2G TX CM OD CINT 2G RX Dual‐Band Radio PSo C 6 MCU 2G SP3T ANT BT 2G RF Matching Ne two rk Diplexer 5G 32 kHz Oscillator 5G TX 5G RX SDIO (6 I/ Os) / UART (4 I/ Os) / Co ntr ol (6 I/ Os) VDDUSB VDDA, VDDIO1 VDDIO0 VDD_NS, VDDD, VDDIO2,VBACKUP 1.8‐3.3V 1.8‐3.3V 1.8V/ 2 .5V 1.8V 5G SP3T UM C Conn e cto r SDIO, UART, Co ntr ol 1.8V Po wer and PSoC IOs VDDIO 3.6V VBAT (0.
PRELIMINARY CYSBSYS-RP01 There are five major subsystems: ■ PSoC 6 MCU ■ Single-chip, ultra-low-power, IEEE 802.11n-compliant, IEEE 802.11ac-friendly Wi-Fi with Integrated Bluetooth® 5.0 radio ■ Crystal and oscillators ■ Chip antenna for Wi-Fi / BT and u.FL connector ■ CapSense® external modulation and integration capacitors and other passives like bypass capacitors and limiting resistors.
PRELIMINARY CYSBSYS-RP01 Mechanical Dimensions Physical dimensions of CYSBSYS-RP01 system is as shown in Figure 3 and Table 1. Figure 3. Board Dimensions: Top Side and Bottom Views 1.0 26.59 1.50 A1 U4 600‐60563‐01 REV03 CYSUB‐RP01 14.00 U3 U5 Y1 U2 U1 Y2 J1 Top Vie w (View from Top) 1.93 Side Vie w ANTENNA AREA 5.06 0.80 1.00 14.00 ANTENNA AREA 8.00 0.60 0.50 0.60 0.40 #1 3.06 1.93 #1 23.53 Bott om Vie w (Vie w from Top) Pad dime nsion Table 1.
PRELIMINARY CYSBSYS-RP01 Castellated Pads Layout J1 U3 U1 U5 Y2 GND P7_0 P6_6 P6_5 P6_7 P6_4 VDDIO1 P9_1 VDDA P9_3 P9_0 P9_4 P9_7 P9_2 GND P12_6 P12_7 VBACKUP VDDIO0 VDDUSB USBDM USBDP GND VDDD XRES_L P10_6 P10_5 P10_7 P8_4 P8_0 P8_3 P8_2 P8_1 P7_3 P0_4 P0_5 GND P6_3 P6_2 P11_0 P10_0 P10_1 P10_2 P10_3 P10_4 Y1 U2 L1 GND GND GND GND GND GND P11_7 P11_3 P11_5 P11_4 P11_6 P11_2 P11_1 GND P5_5 P6_0 P6_1 P5_4 P5_1 P5_0 P5_2 VBAT_WL VBAT_WL GND VDDIO2 P5_7 P5_3 P5_6 L5 A1 Figure 4.
PRELIMINARY CYSBSYS-RP01 Recommended Host PCB Layout Figure 5 provides details that can be used for the recommended host PCB layout pattern for CYSBSYS-RP01. Dimensions are in millimeters unless otherwise noted. Pad length of 1.02 mm as shown in Figure 5 is the minimum recommended host pad length. All dimensions are referenced to the center of the solder pad. To maximize performance, the host layout should follow these recommendations: 1.
PRELIMINARY CYSBSYS-RP01 System Connections Power Supply Connections and Recommended External Components Figure 6 shows the general requirements for power pins on CYSBSYS-RP01. See the DC Specifications table for details on the entire range of supported voltage for each power pins. Figure 6. Board Power Pad Connections 1.8V 3.6V~4.2V U1A C23 10uF 10V 50 1.8V~3.3V GND 65 C38 10uF 10V 1.8V * C40 1uF 25V VBAT_WL1 VBAT_WL2 22 23 C1 4.7uF 25V VDDA VDDIO_WL 25 1.
PRELIMINARY CYSBSYS-RP01 Castellated Pads Pin Description Figure 7.
PRELIMINARY CYSBSYS-RP01 Each port pin has multiple alternate functions. These are defined in the table below. The columns ACT #x and DS #y denote active (System LP/ULP) and deep sleep mode signals respectively. Port.Pin Act #0 Act #1 Act #2 Act #3 DS #2 DS #3 Act #4 Act #5 Act #6 Act #7 Act #8 Act #9 Act #10 Act #12 Act #13 Act #14 Act #15 DS #5 DS #6 P0.4 tcpwm[0].lin tcpwm[1].lin csd.csd_tx: csd.csd_tx_ e[2]:0 e[2]:0 4 n:4 P0.5 tcpwm[0].lin tcpwm[1].lin csd.csd_tx: csd.
PRELIMINARY Port.Pin Act #0 Act #1 Act #2 Act #3 DS #2 DS #3 Act #4 Act #5 Act #6 Act #7 CYSBSYS-RP01 Act #8 Act #9 Act #10 Act #12 Act #13 Act #14 Act #15 P8.0 tcpwm[0].lin tcpwm[1].lin csd.csd_tx: csd.csd_tx_ e[0]:2 e[16]:0 54 n:54 scb[4].uart_ scb[4].i2c_s scb[4].spi_ rx:0 cl:0 mosi:0 peri.tr_io_in put[16]:0 P8.1 tcpwm[0].lin tcpwm[1].lin csd.csd_tx: csd.csd_tx_ e_compl[0]: e_compl[16] 55 n:55 2 :0 scb[4].uart_t scb[4].i2c_s scb[4].spi_ x:0 da:0 miso:0 peri.
PRELIMINARY Port.Pin Act #0 Act #1 Act #2 Act #3 DS #2 DS #3 Act #4 Act #5 Act #6 Act #7 CYSBSYS-RP01 Act #8 Act #9 Act #10 Act #12 Act #13 P11.3 tcpwm[0].lin tcpwm[1].lin csd.csd_tx: csd.csd_tx_ e_compl[2]: e_compl[2]: 81 n:81 3 1 smif.spi_dat scb[5].uart_ a3 cts:1 scb[5].spi_s elect0:1 audioss[1].t x_sdo:1 peri.tr_io_o utput[0]:0 P11.4 tcpwm[0].lin tcpwm[1].lin csd.csd_tx: csd.csd_tx_ e[3]:3 e[3]:1 82 n:82 smif.spi_dat a2 scb[5].spi_s elect1:1 audioss[1].r x_sck:1 peri.
PRELIMINARY CYSBSYS-RP01 External Reset (XRES) CYSBSYS-RP01 has an integrated power-on reset circuit, which completely resets all circuits to a known power on state. This action can also be evoked by an external reset signal, forcing it into a power-on reset state. The XRES signal is an active LOW signal, which is an input to the CYSBSYS-RP01 (ad 49). The CYSBSYS-RP01 module does not require an external pull-up resistor on the XRES input. Electrical Specifications Absolute Maximum Ratings Table 3.
PRELIMINARY CYSBSYS-RP01 Recommended Operating Conditions DC Specifications Table 4. DC Specifications Description Min Typ Max Units VABT_WL Parameter DC supply voltage for dual-band 802.11ac-friendly radio with BT 5.0, VBAT and PA driver supply 3.6 3.6 4.2 V VDDIO_WL DC supply voltage for digital I/O 1.62 1.8 1.
PRELIMINARY CYSBSYS-RP01 Environmental Conditions This section describes the operating and storage conditions for CYSBSYS-RP01. Table 13. Enviro nm e ntal Co nditio ns fo r CYSBSYS-RP01 Description Minimum Specification Maximum Specification 70 °C Operating humidity (relative, non-condensation) -20 °C 5% 85 % Thermal ramp rate 1 °C/s 3 °C/s Storage temperature -40 °C 85 °C ESD 4kV 8kV Operating temperature ESD and EMI Protection Exposed components require special attention to ESD and EMI.
PRELIMINARY CYSBSYS-RP01 RF EXPOSURE: To comply with FCC RF Exposure requirements, the OEM must use the module with on-board chip antenna as-is. The preceding statement must be included as a CAUTION statement in manuals, for products operating with the approved on-board chip antenna, to alert users on FCC RF Exposure compliance. Any notification to the end user of installation or removal instructions about the inte grated radio module is not allowed.
PRELIMINARY CYSBSYS-RP01 LABELING REQUIREMENTS: The Original Equipment Manufacturer (OEM) must ensure that ISED labelling requirements are met. This includes a clearly visible label on the outside of the OEM enclosure specifying the appropriate Cypress Semiconductor IC identifier for this product as well as the ISED Notices above. The IC identifier is 7922A-CYSBSYSRP01. In any case, the end product must be labeled in its exterior wit h “Contains IC: 7922A-CYSBSYSRP01”.
PRELIMINARY CYSBSYS-RP01 Packaging Table 14. Solder Reflow Peak Temperature Part Number CYSBSYS-RP01 Package Maximum Peak Temperature Maximum Time at Peak Temperature No. of Cycles 260 °C 30 seconds 2 73-pin castellated solder pads Table 15. Package Moisture Sensitivity Level (MSL), IPC/JEDEC J-STD-2 Part Number Package CYSBSYS-RP01 73-pin castellated solder pads MSL 3 CYSBSYS-RP01 is offered in tape and reel packaging. Figure 8 details the tape dimensions used for CYSBSYS-RP01. Figure 8.
PRELIMINARY CYSBSYS-RP01 Figure 9 details the orientation of CYSBSYS-RP01 in the tape as well as the direction for unreeling. Figure 9. Tape Dimensions Preliminary Version Figure 10 details reel dimensions used for CYSBSYS-RP01. Figure 10. Tape Dimensions Preliminary Version Document Number: 002-29368 Rev.
PRELIMINARY CYSBSYS-RP01 CYSBSYS-RP01 is designed to be used with pick-and-place equipment in an SMT manufacturing environment. Figure 11 shows the center-of-mass for CYSBSYS-RP01. Figure 11. Center-of-Mass for CYSBSYS-RP01 TBD Preliminary Version TBD Ordering Information Table 16. Ordering Information Part Number CYSBSYS-RP01 Features Package Antenna 73-pin castellated solder pads Chip Antenna Table 17.
PRELIMINARY CYSBSYS-RP01 Acronyms Document Conventions Table 18. Acronyms Used in this Document Table 19.
PRELIMINARY CYSBSYS-RP01 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. PSoC® Solutions Products Arm® Cortex® Microcontrollers Automotive cypress.com/arm cypress.com/automotive Clocks & Buffers Interface cypress.com/clocks cypress.com/iot cypress.com/memory Microcontrollers cypress.