Dual-Port Static RAM with SEM, INT, BUSY Specification Sheet
CY7C145, CY7C144
Document #: 38-06034 Rev. *D Page 2 of 21
Pin Configurations
Figure 1. 68-Pin PLCC (Top View)
Figure 2. 64-Pin PLCC (Top View)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
67
60
59
58
57
56
55
54
53
52
51
50
49
48
3132 3334353637383940414243
5 4 3 2 168 666564636261
A
A
4L
A
3L
A
2L
A
1L
A
0L
INT
L
BUSY
L
GND
M/S
BUSY
R
INT
R
A
0R
I/O
2L
I/O
3L
I/O
4L
I/O
5L
GND
I/O
6L
I/O
7L
V
CC
GND
I/O
0R
I/O
1R
I/O
2R
V
CC
A
2728 29 30
98 7 6
47
46
45
44
A
1R
A
2R
A
3R
A
4R
I/O
3R
I/O
4R
I/O
5R
I/O
6R
25
26
6L
7L
A
8L
A
9L
A
A
10L
11L
V
CC
NC
NC
CE
L
SEM
L
R/W
L
OE
L
NC
I/O
I/O
1L
0L
A
A
6R
7R
A
8R
A
9R
A
10R
NC
NC
CE
R
SEM
R
R/W
R
OE
R
I/O
7R
GND
A
11R
A
5R
A
5L
NC
A
12L
A
12R
CY7C144/5
[3]
[4]
Notes
3. I/O
8R
on the CY7C145.
4. I/O
8L
on the CY7C145.
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