2-Mbit (64K x 32) Flow-Through SRAM with NoBL ArchitectureSpecification Sheet

PRELIMINARY
CY7C1333H
Document #: 001-00209 Rev. ** Page 6 of 12
Truth Table for Read/Write
[2, 3]
Function
WE
BW
A
BW
B
BW
C
BW
D
Read HXXXX
Write No Bytes Written LHHHH
Write Byte A (DQ
A
) L LHHH
Write Byte B – (DQ
B
)LHLHH
Write Byte C (DQ
C
)LHHLH
Write Byte D (DQ
D
) LHHHL
Write All Bytes L L L L L
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