Stellaris® LM3S9B96 Development Kit User ’s Manual DK-LM3S9B96 -03 Co pyrigh t © 2 009– 201 0 Te xas In strumen ts
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Stellaris® LM3S9B96 Development Kit User’s Manual Table of Contents Chapter 1: Stellaris® LM3S9B96 Development Board Overview ................................................................. 7 Features.............................................................................................................................................................. 7 Development Kit Contents ...........................................................................................................................
List of Figures Figure 1-1. Figure 1-2. Figure 2-1. Figure 4-1. Figure B-1. Figure E-1. Figure E-2. Figure E-3. Figure E-4. 4 DK-LM3S9B96 Development Board................................................................................................ 9 DK-LM3S9B96 Development Board Block Diagram ..................................................................... 11 Factory Default Jumper Settings ...................................................................................................
Stellaris® LM3S9B96 Development Kit User’s Manual List of Tables Table 2-1. Table 2-2. Table 2-3. Table 2-4. Table 2-5. Table 2-6. Table 2-7. Table C-1. Table D-1. Table E-1. Table E-2. Board Features and Peripherals that are Disconnected in Factory Default Configuration ............ 13 USB-Related Signals..................................................................................................................... 15 Hardware Debugging Configurations ................................................
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C H A P T E R 1 Stellaris® LM3S9B96 Development Board Overview The Stellaris® LM3S9B96 Development Board provides a platform for developing systems around the advanced capabilities of the LM3S9B96 ARM® Cortex™-M3-based microcontroller. The LM3S9B96 is a member of the Stellaris Tempest-class microcontroller family. Tempest-class devices include capabilities such as 80 MHz clock speeds, an External Peripheral Interface (EPI) and Audio I2S interfaces.
User LED and push button Thumbwheel potentiometer (can be used for menu navigation) MicroSD card slot Supports a range of debugging options – Integrated In-circuit Debug Interface (ICDI) – JTAG, SWD, and SWO all supported – Standard ARM® 20-pin JTAG debug connector USB Virtual COM Port Jumper shunts to conveniently reallocate I/O resources Develop using tools supporting Keil™ RealView® Microcontroller Development Kit (MDK-ARM), IAR Embedded Workbench, Code Sourcery GCC development
Stellaris® LM3S9B96 Development Kit User’s Manual Figure 1-1.
Development Kit Contents The Stellaris® LM3S9B96 Development Kit contains everything needed to develop and run a range of applications using Stellaris microcontrollers: LM3S9B96 development board 8 MB SDRAM expansion board EPI signal breakout board Retractable Ethernet cable USB Mini-B cable for debugger use USB Micro-B cable for OTG-to-PC connection USB Micro-A to USB A adapter for USB Host USB Flash memory stick microSD Card 20-position ribbon cable CD containing
Stellaris® LM3S9B96 Development Kit User’s Manual Block Diagram DK-LM3S9B96 Development Board Block Diagram Target Cable Figure 1-2. I/O Signal Break-out SWD/JTAG Mux Debug USB USB Touch T Dual USB Device Controller Debug I/O Signal Break-out JTAG/SWD Output/Input QVGA Color LCD Module Debug UART0 OTG/Host/Device USB USB micro-AB connector +5V host supply +3.
Dimensions (excluding LCD panel): – 4.50” x 4.25” x 0.60” (LxWxH) with SDRAM board – 4.50” x 4.25” x 0.75” (LxWxH) with EPI breakout board Analog Reference: 3.0 V +/-0.2% RoHS status: Compliant NOTE: When the LM3S9B96 Development Board is used in USB Host mode, the host connector is capable of supplying power to the connected USB device. The available supply current is limited to ~200 mA unless the development board is powered from an external 5 V supply with a =600mA rating.
C H A P T E R 2 Stellaris® LM3S9B96 Development Board Hardware Description In addition to an LM3S9B96 microcontroller, the development board includes a range of useful peripheral features and an integrated in-circuit debug interface (ICDI).
assignments that are supported by the 0.1” jumpers and PCB routing. The LM3S9B96 has additional internal multiplexing that enables additional configurations which may require discrete wiring between peripherals and GPIO pins. The ICDI section of the board has a GND-GND jumper that serves no function other than to provide a convenient place to ‘park’ a spare jumper. This jumper may be reused as required. Figure 2-1. Factory Default Jumper Settings Clocking The development board uses a 16.
Stellaris® LM3S9B96 Development Kit User’s Manual Reset The RESETn signal into the LM3S9B96 microcontroller connects to the reset switch (SW2) and to the ICDI circuit for a debugger-controlled reset.
more than 1 Amp, or if the switches’ thermal limits are exceeded by a device drawing more than 500 mA. USB0PFLT indicates the over-current status back to the microcontroller. The development board can be either a bus-powered USB device or self-powered USB device depending on the power-supply configuration jumpers. When using the development board in USB-host mode, power to the EVB should be supplied by the In-circuit Debugger (ICDI) USB cable or by a +5 V source connected to the DC power jack.
Stellaris® LM3S9B96 Development Kit User’s Manual A small serial EEPROM holds the FT2232 configuration data. The EEPROM is not accessible by the LM3S9B96 microcontroller. For full details on FT2232 operation, go to www.ftdichip.com. USB to JTAG/SWD The FT2232 USB device performs JTAG/SWD serial operations under the control of the debugger. A simple logic circuit multiplexes SWD and JTAG functions and, when working in SWD mode, provides direction control for the bidirectional data line.
Wide temperature range White LED backlight Integrated RAM Resistive touch panel Control Interface The Color LCD module has a built-in controller IC with a multi-mode parallel interface. The development board uses an 8-bit 8080 type interface with GPIO Port D providing the data bus. Table 2-4 shows the LCD-related signals. Table 2-5.
Stellaris® LM3S9B96 Development Kit User’s Manual I2S Audio The LM3S9B96 development board has advanced audio capabilities using an I2S-connected Audio TLV320AIC23 CODEC. The factory default configuration has Audio output (Line Out and/or Headphone output) enabled. Four additional I2S signals are required for Audio input (Line Input and/or Microphone). All four audio interfaces are through 1/8” (3.5mm) stereo jacks. Table 2-6 shows the I2S audio-related signals. Table 2-6.
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C H A P T E R 3 Stellaris® LM3S9B96 Development Board External Peripheral Interface (EPI) The External Peripheral Interface (EPI) is a high-speed 8/16/32-bit parallel bus for connecting external peripherals or memory without glue logic. Supported modes include SDRAM, SRAM, and Flash memories, as well as Host-bus and FIFO modes. The LM3S9B96 development kit includes an 8 MB SDRAM board in addition to an EPI break-out board. Other EPI expansion boards may be available.
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C H A P T E R 4 Using the In-Circuit Debugger Interface The Stellaris® LM3S9B96 Development Kit can operate as an In-Circuit Debugger Interface (ICDI). ICDI acts as a USB to the JTAG/SWD adaptor, allowing debugging of any external target board that uses a Stellaris microcontroller. See “Debugging Modes” on page 16 for a description of how to enter ICDI Out mode. Figure 4-1.
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A P P E N D I X A Stellaris® LM3S9B96 Development Board Schematics This section contains the schematics for the DK-LM3S9B96 development board.
Schematic page 1 4 PC0/TCK PC1/TMS PC2/TDI PC3/TDO 80 79 78 77 25 24 23 22 PC4/EPI02 PC5/EPI03 PC6/EPI04 PC7/EPI05 PE0/EPI08 PE1/EPI09 PE2/EPI24 PE3/EPI25 B 74 75 95 96 6 5 2 1 PE4/I2STXWS PE5/I2STXSD PE6/ADC1 PE7/ADC0 PG0/EPI13 PG1/EPI14 PG7/EPI31 19 18 36 PJ0/EPI16 PJ1/EPI17 PJ2/EPI18 PJ3/EPI19 PJ4/EPI28 PJ5/EPI29 PJ6/EPI30 14 87 39 50 52 53 54 55 PJ7 64 RESETn PA0/U0RX PA1/U0TX PA2/SSI0CLK PA3/SSI0FSS PA4/SSI0RX PA5/SSI0TX PA6/USB0EPEN PA7/USB0PFLT PB0/USB0ID PB1/USB0VBUS PB2/CCP0 PB3 PB4/
Schematic page 2 2 3 +3.3V GND DO DATA0 RSV DATA1 JP12 LED_A JP16 PE6/ADC1 JP17 PE3/EPI25 JP18 PE2/EPI24 +3.3V 12 11 9 10 RESETn 100 C26 0.1UF JP19 PE7/ADC0 R16 10K LED_K ILED+ R59 SW-B3S1000 CARD JP13 ILED- FR4 MISO PA4/SSI0RX SW2 N/C DATA2 CS DATA3 DI CMD VDD 2908-05WB-MG CLOCK FR3 JP11 MISO R19 10K Reset 1 2 3 4 5 6 7 8 +3.3V SSICLK PA2/SSI0CLK X+ TOUCH_XP TOUCH_YN TOUCH_XN TOUCH_YP YX- XR YD XL YU +3.3V Y+ C28 C30 C31 C33 0.01UF 0.01UF 0.01UF 0.
Schematic page 3 1 2 3 4 5 6 TP1 3.3V +3.3V P3V U5 PQ1LA333MSPQ TP3 5.0V DBG+5V +VBUS 4 +5V ICDI 3 C34 0.1UF VOUT A M+3.3V M3V 5 NR 1 C42 2.2UF C39 TP2 GND 0.01UF 2 1 3 2 PJ-002BH-SMT ON C37 2.2UF JP35 EXT J7 VIN JP61 JP34 OTG +5V DC INPUT JP60 +5V GND A GND JP59 JP36 Main +3.3V Supply Power Source Selection +3.3V B EPEN PA6/USBEPE/CAN0RX JP37 PFLT PA7/USBPFLT/CAN0TX U6 TPS2051BDBV +VBUS +5V 5 USB0EPE 4 3 IN EN OCn USB0PFLT B 1 C40 2.
Schematic page 4 1 2 J8 3 4.7K R55 STX-3000 0.47UF R56 4.7K R30 10K 1 2 3 Microphone Input C47 R28 10K STX-3000 6 C79 0.47UF 4.7K A J9 5 C77 R54 1 2 3 Line Input 4 C76 27PF C48 2.2UF R57 4.7K A C78 27PF R31 4.7K 27PF C54 R27 4.7K B + +3.3V R29 4.7K SDA 20 19 17 18 PB3/I2C0SDA JP40 SCL MICBIAS MICIN PB2/I2C0SCL JP41 TXSD PE5/I2STXSD TXSD 23 24 22 21 Rework 2: Loop TXWS to RXWS.
Schematic page 5 1 2 3 4 5 6 SDRAM Expansion Board U10 A Expansion Connector J12 AD2 AD3 AD4 AD5 +3.3V C62 2.
Schematic page 6 2 3 4 5 6 13 1 TCK 11 1 12 Debugger USB Interface 2 54819-0572 D- D+ ID G R43 U13A SN74LVC125A +3.3V 7 USBSH 7 USBDM USBDP R44 1.5K B +5V R39 10K U11 VCC NC ORG GND CS SK DI DO 1 2 3 4 48 1 2 47 R40 1.5K CAT93C46 43 44 1K 64X16 1 Y3 2 4 5 +5V 6.
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A P P E N D I X B Stellaris® LM3S9B96 Development Board Component Locations This appendix contains details on component locations, including: January 12, 2010 Component placement plot for top (Figure B-1) 33
Figure B-1.
A P P E N D I X C Stellaris® LM3S9B96 Development Board Connection Details This appendix contains the following sections: DC Power Jack (see page 35) ARM Target Pinout (see page 35) DC Power Jack The EVB provides a DC power jack for connecting an external +5 V regulated (+/-5%) power source. Center Positive (+) The socket is 5.5 mm dia with a 2.1 mm pin. ARM Target Pinout In ICDI input and output mode, the Stellaris® LM3S9B96 Development Kit supports ARM’s standard 20-pin JTAG/SWD configuration.
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A P P E N D I X D Stellaris® LM3S9B96 Development Board Microcontroller GPIO Assignments Table D-1 shows the pin assignments for the LM3S9B96 microcontroller. Table D-1.
Table D-1. Microcontroller GPIO Assignments (Continued) LM3S9B96 GPIO Pin Number 38 Development Board Use Description Default Function 10 PD0 PD0 11 PD1 12 Default Use Alt.
Stellaris® LM3S9B96 Development Kit User’s Manual Table D-1. Microcontroller GPIO Assignments (Continued) LM3S9B96 GPIO Pin Number Development Board Use Alt.
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A P P E N D I X E Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board This document describes the Flash and SRAM memory expansion board (DK-LM3S9B96-EXP-FS8) plug-in for the DK-LM3S9B96 development board. This expansion board works with the External Peripheral Interface (EPI) port of the Stellaris microcontroller and provides Flash memory, SRAM, and an improved performance LCD interface. Figure E-1.
Figure E-2. DK-LM3S9B96 Development Board Remove board Remove jumpers 4. Install the two snap-in nylon standoffs on mounting holes above the EPI connector J2. 5. Place the expansion board on top of the DK-LM3S9B96 board and align the standoffs, the EPI connector, and the 2x17 J2 header. 6. Press firmly downward until the board snaps in, then verify that the board is firmly seated on the EPI connector, the 2x17 header, and the standoffs. 7.
Stellaris® LM3S9B96 Development Kit User’s Manual 1 Megabyte of SRAM Memory-mapped LCD I/F for improved LCD performance 1 kilobit of I2C memory for storing configuration data Power LED indicator Hardware Description The Flash and SRAM memory expansion board is designed for use with the Stellaris EPI module configured in Host Bus 8 address/data multiplexed mode.
EPI Connector The EPI connector J1 is a 50-pin receptacle with 0.5 mm pitch that plugs into the EPI header on the DK-LM3S9B96 board. The 32 EPI signals and the 2 I2C0 signals from the LM3S9B96 are provided on this connector. It also provides 5 V for the on-board DC regulator. Note that not all EPI signals are used in this design. 8-bit Latch This 8-bit latch is used to store the lower 8-bits of the address, which are transmitted during the address phase of an EPI transfer.
Stellaris® LM3S9B96 Development Kit User’s Manual Memory Map The DK-LM3S9B96-EXP-FS8 expansion board memory map is shown in Table E-1 and Table E-2 shows the LCD Latch register. Table E-1. Flash and SRAM Memory Expansion Board Memory Map Device A[27:26] A[2:0] FLASH 0X XXX Flash memory (8 Megabytes) R/W 0x6000.0000 SRAM 10 XXX SRAM (1 Megabyte) R/W 0x6800.0000 11 000 LCD latch set R/W 0x6C00.0000 11 001 LCD latch clear R/W 0x6C00.
Component Locations Figure E-4 shows the details of the component locations. Figure E-4.
Flash, SRAM 1 2 3 4 5 Revision History MAD[7..0] Revision MA[27..0] J1 3.3V A R5 2.80k R6 2.80k PC4/EPI2 PC5/EPI3 PC6/EPI4 PC7/EPI5 MAD2 MAD3 MAD4 MAD5 U5 1 2 3 7 4 A0 SCL A1 SDA A2 WP GND VCC 6 5 I2CSCL I2CSDA 3.3V 5V 3.3V 8 R1 CAT24C01 1K - 128X8 0 Note: R1 is not fitted C10 0.
LCD Interface 1 2 3 4 5 6 A A MAD[7..0] MA[27..0] MAD[7..0] MA[27..0] L_D[7..0] LCD_DECODE CPLD U6 MAD0 MAD1 MAD2 MAD3 MAD4 MAD5 MAD6 MAD7 MA24 MA25 MA26 MA27 B ALE MOEn MWEn TP1 TP2 TP3 TP4 TP5 TP6 44 45 46 47 48 2 3 4 7 8 9 10 14 15 16 17 43 18 19 42 CPLD_TCK CPLD_TMS CPLD_TDI CPLD_TDO 1 11 25 35 3.
A P P E N D I X F References In addition to this document, the following references are included on the Stellaris Family Development Kit documentation CD-ROM and are also available for download at www.ti.com/ stellaris: Stellaris LM3S9B96 Microcontroller Data Sheet Kitronix LCD Data Sheet StellarisWare Driver Library StellarisWare Driver Library User’s Manual, publication number SW-DRL-UG Additional references include: FT2232D Dual USB/UART FIFO IC Data sheet, version 0.
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