Specifications

CY8C21123/CY8C21223/CY8C21323
Document Number: 38-12022 Rev. *Y Page 29 of 46
AC Programming Specifications
Table 33 lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and
–40 °C  T
A
 85 °C, or 3.0 V to 3.6 V and –40 °C  T
A
 85 °C, respectively. Typical parameters apply to 5 V, 3.3 V, or 2.7 V at 25 °C
and are for design guidance only.
AC I
2
C Specifications
Table 34 lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and
–40 °C  T
A
 85 °C, 3.0 V to 3.6 V and –40 °C  T
A
 85 °C, or 2.4 V to 3.0 V and –40 °C  T
A
 85 °C, respectively. Typical parameters
apply to 5 V, 3.3 V, or 2.7 V at 25 °C and are for design guidance only.
Table 33. AC Programming Specifications
Symbol Description Min Typ Max Units Notes
t
RSCLK
Rise time of SCLK 1 – 20 ns
t
FSCLK
Fall time of SCLK 1 – 20 ns
t
SSCLK
Data set up time to falling edge of SCLK 40 – – ns
t
HSCLK
Data hold time from falling edge of SCLK 40 – – ns
F
SCLK
Frequency of SCLK 0 – 8 MHz
t
ERASEB
Flash erase time (block) – 10 – ms
t
WRITE
Flash block write time – 80 – ms
t
DSCLK3
Data out delay from falling edge of SCLK – – 50 ns 3.0  V
DD
 3.6.
t
DSCLK2
Data out delay from falling edge of SCLK – – 70 ns 2.4  V
DD
 3.0.
t
ERASEALL
Flash erase time (bulk) – 20 – ms Erase all blocks and
protection fields at once.
t
PROGRAM_HOT
Flash block erase + flash block write time – – 180
[25]
ms 0 °C  Tj  100 °C.
t
PROGRAM_COLD
Flash block erase + flash block write time – – 360
[25]
ms –40 °C  Tj  0 °C.
Table 34. AC Characteristics of the I
2
C SDA and SCL Pins for V
CC
3.0 V
Symbol Description
Standard Mode Fast Mode
Units
Min Max Min Max
F
SCLI2C
SCL clock frequency 0 100 0 400 kHz
t
HDSTAI2C
Hold time (repeated) START condition. After this
period, the first clock pulse is generated.
4.0 –0.6–µs
t
LOWI2C
Low period of the SCL clock 4.7 –1.3–µs
t
HIGHI2C
High period of the SCL clock 4.0 –0.6–µs
t
SUSTAI2C
Setup time for a repeated START condition 4.7 –0.6–µs
t
HDDATI2C
Data hold time 0 –0–µs
t
SUDATI2C
Data setup time
0
250
0
–
0
100
[24]
–
0
ns
0
t
SUSTOI2C
Setup time for STOP condition 4.0 –0.6–µs
t
BUFI2C
Bus free time between a STOP and START condition 4.7 –1.3–µs
t
SPI2C
Pulse width of spikes are suppressed by the input filter – – 0 50 ns
Notes
24. A fast-mode I
2
C-bus device can be used in a standard-mode I
2
C-bus system, but the requirement t
SUDAT
 250 ns must then be met. This automatically becomes
the case if the device does not stretch the LOW period of the SCL signal. If such device does stretch the LOW period of the SCL signal, it must output the next
data bit to the SDA line t
rmax
+ t
SUDAT
= 1000 + 250 = 1250 ns (according to the standard-mode I
2
C-bus specification) before the SCL line is released.
25. For the full industrial range, you must employ a temperature sensor user module (FlashTemp) and feed the result to the temperature argument before writing.
Refer to the application note, Design Aids — Reading and Writing PSoC
®
Flash – AN2015 for more information on Flash APIs.