Specifications

CY8C21123/CY8C21223/CY8C21323
Document Number: 38-12022 Rev. *Y Page 23 of 46
AC Electrical Characteristics
AC Chip-Level Specifications
Table 22 lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and
–40 °C  T
A
 85 °C, 3.0 V to 3.6 V and –40 °C  T
A
 85 °C, or 2.4 V to 3.0 V and –40 °C  T
A
 85 °C, respectively. Typical parameters
apply to 5 V, 3.3 V, or 2.7 V at 25 °C and are for design guidance only.
Table 22. 5-V and 3.3-V AC Chip-Level Specifications
Symbol Description Min Typ Max Units Notes
F
IMO24
[14]
IMO frequency for 24 MHz 22.8 24
25.2
[15,16]
MHz Trimmed for 5 V or 3.3 V
operation using factory trim
values. Refer to Figure 11 on
page 16.
SLIMO mode = 0.
F
IMO6
IMO frequency for 6 MHz 5.5 6
6.5
[15,16]
MHz Trimmed for 3.3 V operation using
factory trim values. See Figure 11
on page 16.
SLIMO mode = 1.
F
CPU1
CPU frequency (5 V nominal) 0.0937 24
24.6
[15]
MHz 12 MHz only for
SLIMO mode = 0.
F
CPU2
CPU frequency (3.3 V nominal) 0.0937 12
12.3
[16]
MHz SLIMO Mode = 0.
F
BLK5
Digital PSoC block frequency
0
(5 V nominal)
0 48
49.2
[15,17]
MHz Refer to the section AC Digital
Block Specifications on page 26.
F
BLK33
Digital PSoC block frequency
(3.3 V nominal)
0 24
24.6
[17]
MHz
F
32K1
ILO frequency 15 32 64 kHz
F
32K_U
ILO untrimmed frequency 5 – 100 kHz After a reset and before the M8C
starts to run, the ILO is not
trimmed. See the system resets
section of the PSoC Technical
Reference Manual for details on
this timing.
t
XRST
External reset pulse width 10 – – µs
DC24M 24 MHz duty cycle 40 50 60 %
DC
ILO
ILO duty cycle 20 50 80 %
Step24M 24 MHz trim step size – 50 – kHz
Fout48M 48 MHz output frequency 46.8 48.0
49.2
[15,16]
MHz Trimmed. Using factory trim
values.
F
MAX
Maximum frequency of signal on row input or
row output.
– – 12.3 MHz
SR
POWER_UP
Power supply slew rate – – 250 V/ms V
DD
slew rate during power-up.
t
POWERUP
Time from end of POR to CPU executing code – 16 100 ms Power-up from 0 V. See the
system resets section of the
PSoC Technical Reference
Manual.
t
jit_IMO
24-MHz IMO cycle-to-cycle jitter (RMS)
[18]
– 200 700 ps
24-MHz IMO long term N cycle-to-cycle jitter
(RMS)
[18]
– 300 900 ps N = 32
24-MHz IMO period jitter (RMS)
[18]
– 100 400 ps
Notes
14. Errata: When the device is operated within 0 °C to 70 °C, the frequency tolerance is reduced to ±2.5%, but if operated at extreme temperature (below 0 °C or above
70 °C), frequency tolerance deviates from ±2.5% to ±5%. For more information, see “Errata” on page 42.
15. 4.75 V < V
DD
< 5.25 V.
16. 3.0 V < V
DD
< 3.6 V. Refer to the application note, Adjusting PSoC Microcontroller Trims for Dual Voltage-Range Operation – AN2012 for more information on trimming
for operation at 3.3 V.
17. See the individual user module datasheets for information on maximum frequencies for user modules.
18. Refer to the application note, Understanding Datasheet Jitter Specifications for Cypress Timing Products – AN5054 for more information on jitter specifications.